Information about the three PolySix waveform images I have uploaded. R Grieb 6/7/2014 These waveforms were captured on a KLM-367 board with the synthesizer idle. p20to23.png is a capture of P20 (yel) P21 (blue) P22 (violet) and P23 (green) as they would look on IC23 and IC18 and 19. This sequence repeats. You can just see the start of the next cycle on the right side of the screen. abinhdac.png has P20 ("A" input to 4051 IC18) and P21, same as above waveform. In addition, it shows the INH (pin 6) signal at IC18 and the DAC output at TP2 or pin 3 of the 4051. The values that get fed through the 4051 and onto the sample and hold capacitors at its outputs are the DAC values when the violet (INH) signal is low. For this photo, the EFF SP/INT pot was set to minimum (-5V). You can see that this voltage is on the DAC output during the first timeslot with INH low. The CUTOFF pot was set to the middle (0V). You can see this value during the second timeslot with INH low. The EG INT pot was set to max (+5V). You can see this value on the DAC output during the third timeslot with INH low. The other controls were set to their middle positions, although it looks like the resonance pot was also set to max. In addition to writing values out to the sample and hold capacitors, the CPU is also doing A to D conversion on the front panel controls. These don't happen at exactly the same time, as the DAC is needed for both operations. In abinhdac, you can see the DAC being used for A to D conversion when the INH signal to IC18 (violet) is high. sa2.png is a closer look at one A to D conversion. The yellow and violet signals are the same as in abinhdac.png, but we are zoomed in. The blue signal is the output of comparator IC6-1 and the green signal is the DAC output. The comparator output is low when the DAC output is higher than the voltage we are trying to convert. In this case, the next DAC value is lower. In the photo, the potentiometer being converted was set to a negative voltage. The "4" on the left of the photo shows where gnd would be for the DAC output. You can see that it takes 8 steps for the DAC to get to where its voltage matches the potentiometer one. This technique is called "successive approximation" and is a common way to perform A to D conversion using a DAC and a comparator.