Hi Andrew, let me address a few points:
> Since there were no circuit modifications other than C23 being lowered to
> 10pF then we will have to suspect the layout, density and shape of the
> copper on the new board (or even the properties of the new ceramic
> resonator, if you didn't do a transplant!).
I actually did transplants for the two new boards. It would also be
possible that even the type of chip socket for IC22 plays a role here.
After all, we're talking about very low capacitance values here.
Interestingly both the Polysix and the Poly-61 all use the same values (10p
and 22p) in the clock circuit for their 8048 and 8049 chips.
> As interesting as circuit analysis is
> I think there is a risk of getting to bogged down in theory and looking for
> problems where there are none.
As I see it we have a problem (clock instability on some boards), we have a
solution (lowering C23) which points at the general source of the problem
(capacitance mismatch). I think it is a good idea to pinpoint this as far
as possible. This in turn should give us the chance to simply measure this
part of the circuit on newly constructed boards and see if we are within
certain specs (and then possibly change the values accordingly). It may
also lead to new values for C22 and C23 that fit all boards.
> This might, if viewed by a non-technical
> reader, also imply that the board isn't fit for purpose in some way and put
> them off restoring their classic! (Which was the whole point in the first
> place).
Perhaps, but they would be wrong about this.
I'll work on this a bit more when I have time. A deeper search led to an
Intel Application note (AP-155) that discusses the various oscillator types
from roughly that era (and how to troubleshoot them!). Interesting read, to
say the least.