I like the design, but can someone give a a detailed explination of how
this would work? I am only familiar with the standard ADSR EG. -Nate
> From:
>"David Bivins" <dbivins@...>
>
>
>I LIKE THIS!!! Best so far for me. Anyone else?
>
>
>
>> -----Original Message-----
>
>> From: Dave Bradley [mailto:daveb@...]
>
>> Sent: Wednesday, February 02, 2000 1:45 PM
>
>> To: motm@onelist.com
>
>> Subject: RE: [motm] VC AR EG mockup with Delay
>
>>
>
>>
>
>> From: "Dave Bradley" <daveb@...>
>
>>
>
>> Well, hey - here's one with delay.
>
>>
>
>> Dave Bradley
>
>> Principal Software Engineer
>
>> Engineering Animation, Inc.
>
>> daveb@...
>
>>
>
>> > From: hodad1@...
>
>> >
>
>> > Here's my less-than-informed notion:
>
>> > What about a DAR EG? Eliminate the A/R Cv pot, maybe have a
>
>> -OUT jack as
>
>> > well as a +OUT.
>
>> >
>
>> > Is that feasible/sensible etc.?
>
>> >
>
>> > tomr
>
>> > ----- Original Message -----
>
>> > From: Paul Schreiber <synth1@...>
>
>> > To: <motm@onelist.com>
>
>> > Sent: Wednesday, February 02, 2000 2:41 PM
>
>> > Subject: Re: [motm] VC AR EG mockup
>
>> >
>
>> >
>
>> > > From: "Paul Schreiber" <synth1@...>
>
>> > >
>
>> > > This is about 100 times easier to do than a massive VC DADSR
>
>> super-whiz
>
>> > bang
>
>> > > module.
>
>> > >
>
>> > > Everybody like this idea??
>
>> > >
>
>> > > Paul S.
>
>>
>
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