On Thu, 16 Oct 2008 16:54:55 -0700, you wrote:
>I figured it out in Eagle - needed to draw boxes over all the places
>on the tRestrict layer (41) then it works great. My boards are so
>much easier now!
So where are you drawing the restriction boxes? around all the pads?
Harvey
>
>Henry
>
>On Thu, Oct 16, 2008 at 4:21 PM, Harvey White <madyn@...> wrote:
>> On Thu, 16 Oct 2008 14:39:35 -0700, you wrote:
>>
>>>Most pcb programs assume holes are through plated which isn't the case
>>>when I make my own double sided board. Do you guys usually solder
>>>both the top and bottom of a pin that's through plated?
>>
>> No. Some items (IC sockets) cannot be treated that way. Some items
>> are designed to be soldered on one side only (resistor networks).
>>
>> I use separate VIAS, and do not allow a wire to terminate at a
>> component pad for any layer other than the bottom.
>>>
>>>If anyone is using Eagle, in the Single Sided demo, whenever I
>>>autoroute it, it knows to generate wire bridges for the top layer.
>>>
>>>I use the same CTL file but whenever I generate my own board, it seems
>>>to assume plated through holes.
>>>
>>>I checked the DRC and they seem to be the same.
>>>
>>>How do I get Eagle to treat the board like in Single Sided demo and
>>>not plated through holes? Thanks.
>>
>> Other than copying the rules over, that's all I know.
>>
>> Harvey
>>
>>>Henry
>>