Actually, it's the high ESR, which masks the lead and trace inductance. Or
something like that. I'm sure others will correct this quickly if it's the
least bit misleading or oversimplifying. The rule of thumb is one big, high
ESR capacitor per board, and one low ESR cap for each power/ground pair per
device. It's the small ones that need special care in layout.
----- Original Message -----
From: "sbdwag" <sbdwag@...>
To: <Homebrew_PCBs@yahoogroups.com>
Sent: Saturday, February 18, 2006 10:37 PM
Subject: [Homebrew_PCBs] Re: Please critique my first attempt at pcb etching
(links corrected)
> Im curious how do big capacitors have internal inductance. If they
> have inductance wouldnt that cancel some of the capitance that they
> have? Are you talking about the leakage current? This would be the
> only thing that passed dc.