<html><head><meta http-equiv="content-type" content="text/html; charset=utf-8"></head><body style="overflow-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;"><br id="lineBreakAtBeginningOfMessage"><div><br><blockquote type="cite"><div>On 17. Mar 2024, at 08:54, brianw <brianw@audiobanshee.com> wrote:</div><div><br style="caret-color: rgb(0, 0, 0); font-family: Helvetica; font-size: 18px; font-style: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration: none;"><span style="caret-color: rgb(0, 0, 0); font-family: Helvetica; font-size: 18px; font-style: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration: none; float: none; display: inline !important;">This is a good point. I think that most hardware PLL expect the two clocks to be much closer than 1:2</span></div></blockquote>Most high frequency PLLs only discriminate phase to minimise time delay (and therefore dead-time) through the phase detector. If a capture range greater than 2:1 is required then a second stage of ‘memory’ is added to the phase detector, to detect two or more pulses of one signal in the period of the other one. I think the 4046 implements this kind of phase detector, and if you want a proper study of this then the Rohde book “Digital PLL Frequency Synthesisers: Theory and Design” section 4.4.4 has more information than anyone could ever wish for, including state diagrams.<br><blockquote type="cite"><div><span style="caret-color: rgb(0, 0, 0); font-family: Helvetica; font-size: 18px; font-style: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration: none; float: none; display: inline !important;">I'm also reminded of Craig Anderton's "ring modulator" circuit from his Electronic Projects for Musicians. That's the only hardware PLL I've ever built. Don't ask me how a PLL turns out to be a ring modulator…</span></div></blockquote>The ring modulator is one form of phase detector<br></div><br><div>Phil.</div></body></html>