<div dir="ltr">A few sentences here about how FPGA is used to generate DAC outputs from FPGA for 3 Body oscillator.<div><a href="https://youtu.be/iVmGgd6gzJ0?t=192">https://youtu.be/iVmGgd6gzJ0?t=192</a><br></div><div><br></div><div><br></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Dec 7, 2023 at 6:01 PM Mike Bryant <<a href="mailto:mbryant@futurehorizons.com">mbryant@futurehorizons.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div class="msg-1144728893031508305">
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<span style="font-family:Aptos,Aptos_EmbeddedFont,Aptos_MSFontService,Calibri,Helvetica,sans-serif;font-size:11pt;color:rgb(0,0,0)"><a href="https://northcoastsynthesis.com/news/dacs-and-bit-count/" target="_blank">https://northcoastsynthesis.com/news/dacs-and-bit-count/</a><br>
et seq</span></li></ul>
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<div><span style="font-family:Aptos,Aptos_EmbeddedFont,Aptos_MSFontService,Calibri,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">I just had a read of this and generally very well put. However you seem to miss out
mentioning PDM between the sections on PWM and Delta-Sigma. This gives faster settling time of DC voltages than PWM, as well as other advantages when producing audio as its easier to push the noise out of band. </span></div>
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<div><span style="font-family:Aptos,Aptos_EmbeddedFont,Aptos_MSFontService,Calibri,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">I used PDM (using 74LS TTL and some transistors) in the 1980s for an accurate fast settling
DC voltage reference in a HP instrument requiring better then 16 bits as one of its uses was to verify in production the then new 16 bit(-ish) convertors.</span></div>
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<div id="m_-1144728893031508305divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Synth-diy <<a href="mailto:synth-diy-bounces@synth-diy.org" target="_blank">synth-diy-bounces@synth-diy.org</a>> on behalf of Matthew Skala via Synth-diy <<a href="mailto:synth-diy@synth-diy.org" target="_blank">synth-diy@synth-diy.org</a>><br>
<b>Sent:</b> 08 December 2023 01:21<br>
<b>To:</b> Danjel van Tijn / intellijel <<a href="mailto:danjel@intellijel.com" target="_blank">danjel@intellijel.com</a>><br>
<b>Cc:</b> SDIY <<a href="mailto:synth-diy@synth-diy.org" target="_blank">synth-diy@synth-diy.org</a>><br>
<b>Subject:</b> Re: [sdiy] Generating a large number of CV outputs</font>
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<div>On Thu, 7 Dec 2023, Danjel van Tijn / intellijel wrote:<br>
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> Let's say I wanted to generate 100 outputs with an update rate of a few kHz<br>
> and an equivalent bit depth of 12 or 16 bits.<br>
<br>
Which is it, 12 or 16? You've got your work cut out for you if you really<br>
want 16-bit absolute DC voltage precision on even one output. The number<br>
of outputs isn't your biggest concern when that's a serious goal.<br>
<br>
> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel<br>
> DACs? <br>
><br>
> Or would it make more sense to use an FPGA and create a giant multi-channel<br>
> 1-Bit DAC?<br>
<br>
Using an FPGA is going to require you to solve for yourself a lot of<br>
problems that would be solved for you if you used ready-made DAC chips.<br>
I wouldn't be eager to do that. I also don't think 1-bit DACs are<br>
well-suited to generating precise DC voltages; as I wrote at length in my<br>
recent Web log series (<a></a><a href="https://northcoastsynthesis.com/news/dacs-and-bit-count/" target="_blank">https://northcoastsynthesis.com/news/dacs-and-bit-count/</a><br>
et seq.), they reproduce signals, not voltages.<br>
<br>
However, if you do put in the effort to make it work, the FPGA would<br>
probably be cheaper.<br>
<br>
-- <br>
Matthew Skala<br>
North Coast Synthesis Ltd.<br>
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