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<DIV dir=ltr align=left><SPAN class=252501906-21092021>Hello Harry,</SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=252501906-21092021></SPAN> </DIV>
<DIV dir=ltr align=left><SPAN class=252501906-21092021><FONT
face="times new roman">I tried it. It had no effect. I'm now putting
together Tim's test circuit on a breadboard to see if that
works.</FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=252501906-21092021></SPAN> </DIV>
<DIV dir=ltr align=left><SPAN class=252501906-21092021><FONT
face="times new roman">Cheers,</FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=252501906-21092021>Dave</SPAN></DIV><BR>
<DIV dir=ltr lang=en-us class=OutlookMessageHeader align=left>
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<FONT size=2 face=Tahoma><B>From:</B> Mr&MrsAccount
[mailto:hbissell@wowway.com] <BR><B>Sent:</B> Monday, September 20, 2021 7:03
PM<BR><B>To:</B> David G Dixon<BR><B>Cc:</B>
synth-diy@synth-diy.org<BR><B>Subject:</B> Re: [sdiy] Issue with CD4024 Ripple
Counter<BR></FONT><BR></DIV>
<DIV></DIV>
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<DIV>Although this sort of defies conventional wisdom, I've often fixed CD4024
(and other 4000 series clocked circuits) with a small capacitor from the
clock</DIV>
<DIV>input to ground. I suspect I had some noise or glitch around
the trigger point and this damped out the anomaly.</DIV>
<DIV><BR></DIV>
<DIV>It might double clock, or triple clock etc. on a noise at the transition
point.</DIV>
<DIV><BR></DIV>
<DIV>We are talking maybe 15 - 50pf or so...</DIV>
<DIV><BR></DIV>
<DIV>Another issue is counters that have "schmitt trigger" on the inputs.
One manufacturer used a schmitt trigger as the input stage (right) and another
who cloned the chip used an ordinary logic buffer ~followed~ by a schmitt
trigger as the second stage. So it the first gate screws up and
multi-clocks the schmitt trigger makes the rise time of the defective clocks
even faster (what were they thinking?). Today there might only BE
one manufacturer... To bad 4000 series was one of my favorite families of
all time. But with sub 5V supplies it's no longer good...</DIV>
<DIV><BR></DIV>
<DIV>Harry</DIV>
<DIV><BR></DIV>
<DIV>----- Original Message -----<BR>From: David G Dixon via Synth-diy
<synth-diy@synth-diy.org><BR>To: synth-diy@synth-diy.org<BR>Sent: Mon, 20
Sep 2021 21:18:58 -0400 (EDT)<BR>Subject: Re: [sdiy] Issue with CD4024 Ripple
Counter<BR></DIV>
<DIV><BR></DIV>
<DIV><BR></DIV>
<DIV><SPAN class=684555200-21092021>Just for Ss and Gs, I thought I'd show you
<BR>my layout graphic for the ASR board which has the clock circuit on it.
<BR>Please see attached. Note that red traces are the +V rail
<BR>and green traces are the GND rail (and black traces are the -V
<BR>rail). The CLOCK pin of the 4024 is connected to the light blue
<BR>trace. I've also attached what I call the "Build" picture, which is
what <BR>the board actually looks like. Finally, I've attached a picture
of the <BR>actual board. Note that there is another circuit board that
this one plugs <BR>into, which has a DG333 and comparators for controlling the
"Shift/Bypass" <BR>switches on each ASR channel electronically. That's
what the 3- and 4- pin <BR>headers plug into. The 4-pin header passes
through that board and connects <BR>to the Panel PCB. This is where the
clock signal comes in and out of this <BR>board.</SPAN></DIV>
<DIV><SPAN class=684555200-21092021></SPAN> </DIV>
<DIV><SPAN class=684555200-21092021>The rail traces are a bit thicker than the
<BR>other traces. You will notice that the ground traces do not connect to
<BR>each other across the top of the board, so that the ground at the 4024
actually <BR>comes up from the bottom. I just tried jumpering the two
ground traces <BR>temporarily with alligator clips and it had no effect (and why
should <BR>it?).</SPAN></DIV>
<DIV><SPAN class=684555200-21092021></SPAN> </DIV>
<DIV><SPAN class=684555200-21092021>Also, I should mention that when the ASR is
<BR>being clocked by an external LFO, the CD4024BE is clocking on the positive
edge <BR>only. However, when the Manual clocking switch is used, the
CD4024BE is <BR>clocking on both edges. The clock signal at the CLOCK pin
looks identical <BR>in either case. The manual clocking switch is
connected to the +V and GND <BR>rails, and is fed to the comparator through a 1k
resistor, whereas the clock <BR>input jack is connected through a 10k
resistor. Why any of this should <BR>have an effect is beyond me.
This, for me, is now more or less in the <BR>realm of the supernatural, in
terms of my ability to understand <BR>it.</SPAN></DIV>
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