[sdiy] Digital Waveshape Generator.

[brianw]

How is the SRAM loaded with the Waveshape data?

I do not know whether they are still manufactured, but there are dual-port RAM chips (probably DRAM) design for framebuffer display memory, where there are two address and data busses. One bus is a read/write interface that supports random access by the main program. The other bus is serial, and only supports sequential reads of the data in memory. It seems that a dual-port RAM would be just as useful for a DWG as it is for a video display framebuffer.

The digital synthesizer that Hal Chamberlin designed for his Master's Thesis used ROM instead of RAM, so the question of loading the wave shapes is handled. There were triangle, square, and sawtooth/ramp. I don't recall sine, but that would be just as easy to provide in a ROM.

Brian


On Jul 12, 2025, at 4:06 PM, Phillip Harbison wrote:
> Phillip Harbison wrote:
>> I could use my divider scheme and 14.4 MHz clock to generate the 12 notes of the top octave and use PLLs to multiply each by 256, but 12 PLLs and 12 sets of counters is a lot of chips. ...
> 
> I have updated my document which is here.
> 
> http://www.xavax.com/alvitar/DWG_Design.pdf
> 
> New block diagrams are attached. I probably will not pursue this. Richie has convinced me DDS is a better approach.