[sdiy] Critique my gate output buffer?
Paul Glass-Steel
pfglasteel at gmail.com
Tue Nov 26 20:37:16 CET 2024
Chris,
Thanks for your thoughts on this. After another round of experimentation
I'm once again leaning towards a transistor-based solution; I wasn't really
able to come up with a realistic use case where the op-amp seemed much
better. I'm also thinking about your question of the wire-OR function
really being worthwhile. I have a fine dedicated OR module and sometimes,
it's nice to not have what seems like "hidden" functionality.
-Paul
On Mon, Nov 25, 2024 at 11:42 AM Chris McDowell <declareupdate at gmail.com>
wrote:
> K one more.
>
> What happens here is the more outputs you OR together in this way, the
> lower that 22k looks and the more voltage develops across your 1k resistor,
> which basically wont ever really matter. I still think tempting your op amp
> to overshoot or whatever funky thing it wants to do with your diode and
> cable capacitance is unnecessary given that a 220R resistor in series with
> the diode would handle it. or put the parallel R and C from output to minus
> input like you know you're supposed to :P
>
> in my personal system, everything has some manner of 100k to ground on the
> inputs and I would leave the 22k out entirely. I guess what I would
> *actually* do is build an explicit OR module.
>
> Cheers,
> Chris
>
> On Nov 25, 2024, at 11:20 AM, Chris McDowell <declareupdate at gmail.com>
> wrote:
>
> This is like swapping your output resistor with a diode, which means your
> capacitive load is only, yknow, capacitively loading when the diode is
> conducting. I don't think there is a lot of value in putting the output
> resistor in the feedback loop for gate outputs, as we'd usually do that to
> increase DC accuracy at the receiving equipment. I would move your output
> resistor out of the feedback loop to take stability out of the
> conversation. You then have something pretty normal that will OR with
> similar outputs, up to some limit where all your 100ks (and whatever all
> the various input resistances) in parallel are too low a resistance to get
> your gates across. that's a lot, though.
>
> Cheers,
> Chris
>
> On Nov 24, 2024, at 12:42 PM, Paul Glass-Steel via Synth-diy <
> synth-diy at synth-diy.org> wrote:
>
>
> I'm hoping to improve on the typical transistor emitter-follower, wire-OR
> capable gate output buffer that many of my modules have inherited from CGS
> and NLC. I've come up with this: https://tinyurl.com/259pt83t - it seems
> happy on my bench, the voltage is stable under a lot of fan-out to multiple
> inputs and it seems ok with long cables / capacitive loads. But I thought
> I'd check here to see if I'm missing something.
>
> Thanks,
> -Paul
>
>
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