[sdiy] VCPO Variable-Phase Oscillator

Tim Parkhurst tim.parkhurst at gmail.com
Mon May 20 01:09:47 CEST 2024


Hi All,
Here's a weird little something I came up with several years ago that I
think might be fun. It uses two VCO cores and a special synchronization
circuit that allows voltage control of the phase between the two cores
while they track at the same frequency. It's something I haven't seen
before, so I'm thinking it's a super-special invention I came up with. In
any case, that's my story, and I'm sticking to it. The theory below is a
bit of a read, but I've got a little more documentation to go with it if
anyone is really interested.
============================
The VCPO features two triangle core oscillators in a setup that allows one
core to drive the second. The output from the second core is variable in
phase relative to the first. Let's see if I can give it a decent
explanation...
===
The circuit uses two triangle core VCOs. It derives a signal from the first
core (call it A) and uses that to drive the second core (B). In the schemo
here, I'm using two VERY simple 2164 VCOs, but the same sync / drive scheme
could be applied to other triangle cores. This particular setup doesn't
quite track 1 v/oct, but that is just because I used the simplest setup I
could come up with for this first shot. With some adjustments and
component tuning, I think it could be made to track just fine. As an LFO
though, it works nicely. You could probably build one of these that tracked
pretty well with a 13700-based core, or a slightly more elaborate 2164
circuit.

Core A is based around U5, U6, and U7. U1 and U2 form the CV summer. The CV
drives U6 (Core A) and U6 (Core B). Core A is just a basic, plain vanilla
tri core, with U5 acting as the comparator, and U7 acting as the integrator.

Core B is based around U8, U6, and U9. Core B is also fairly standard, BUT
NOTE that there is no hysterisis feedback around the comparator, U8 (Core A
uses R10). This is important, because the comparator gets an input signal
that is a combination of the Core B integrator (through R21) and the Core A
integrator (through R20). This is a big part of what keeps the two cores
locked to the same frequency.

Now here's the "secret sauce:" U4 and Q1 change the polarity of the
reference voltage going to the comparator of Core B. Normally, if you have
a triangle going to a comparator input and you vary the reference voltage,
you'll get pulse-width modulation. However, what we do here is use Q1 and
U4 as a sign flipper, so that the reference voltage to the comparator
SWITCHES POLARITY depending on whether the triangle at the comparator input
is on the up slope or the down slope. The result is that we get a variable
PHASE square wave coming out of the comparator.

Basically, we take the triangle from Core A, and compare it in U4 to a
reference voltage that changes polarity with the slope of the triangle.
This gives us a variable phase square, and we use THAT to drive the Core B
integrator. R21 provides a 'weak feedback' that helps keep the Core B
triangle levels correct. The sign flipper (Q1, U4) is driven by the square
wave from the Core A comparator (U5).

In the Phase CV Summer / Sign Flipper (U3, U4, Q1), I use R37 to compensate
for a slight offset that was introduced into the Core B outputs (B1=Square,
B2=Tri). A better method  might be to use R33 instead. I have not tested
the R33 method, but you would adjust this until the Phase CV coming out of
U4 was equal in magnitude when it flipped sign. Again, if you use R33, you
might not need R37. D3 and D4 are also untested, but are meant to avoid
having the Phase CV from U4 exceed the +/-5V limits of the triangle
outputs. If this CV goes above +5 or below -5, a DC offset will be
introduced into the Core B outputs.

So basically, that's it. Two triangle cores, remove the hysterisis feedback
from the B comparator, and use the sign flipper to derive a variable phase
square wave from Triangle A to drive Comparator B. Again, my guess is that
the U3, Q1, U4 circuitry could be applied to sync just about any two
triangle core designs. Ideally, you want the two tri cores to track
together fairly well to avoid introducing more level differences between
the A and B outputs. This might work well with the two gain cells available
in an LM13700. Also, the output current from the CV Summer would need to be
doubled from that of a typical application, since it will be driving two
VCO cores.

I've tested this circuit on a breadboard and it's a lot of fun. The sign
flipper scheme allows you to vary the phase of the Wave B outputs, but it
avoids the waveform discontinuities you'd get with a traditional capacitor
reset "sync" circuit.

One limitation of this circuit is that it 'only' allows the B output to
vary up to 180 degrees from the A output. This means that you can't quite
get 'through zero' phase cancellation between the two outputs. To overcome
this, I've thought of using the output of Core B to drive a third VCO core
(C) utilizing another Phase CV Summer / Flipper. In theory, this would
allow the C outputs to vary by up to 360 degrees from the A outputs.
=============================
Okay, there it is. Whaddaya think?

Tim (going through a phase) Servo
---
"Imagination is more important than knowledge." - Albert Einstein
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