[sdiy] Adding reset clock to CD4520

[Roman]

There's no need to reset by Q3, so this original connection may be omited and reset input is then free to use without fear.

Roman 

---- Użytkownik S Ridley via Synth-diy napisał ----

>In the stock TKB the 4520B is supposed to be reset by Q3 going high, which
>is why Q3 is tied to reset pin.
>If you want to add an external reset, you need to OR Q3 and your new reset
>pulse - either with an OR gate or maybe a couple of diodes.
>Having the inverter out and Q3 out tied directly together is never a good
>idea.
>
>Steve
>
>On Sat, 22 Jun 2024 at 14:14, Roman Sowa via Synth-diy <
>synth-diy at synth-diy.org> wrote:
>
>> First of all, tying 13 with 15 is pointless. It is there only to reset
>> the counter after 4 clocks, making it modulo 4, but since you want only
>> 2 LSBs (pins 11-12) there's no difference if it counts to 4, 8 or 16.
>> Might have more sense if it was 4518 and not 4520. So cut this
>> connection. Like it is now, the inverter's reset pulse forces counter
>> output (13) to high level, so if the inverter isn't strong enough,
>> external reset will not work. Likeweise if the inverter is stronger than
>> the counter the 13-15 link will not work anyway. Long story short - if
>> it works, depends on actual chips used, year, maker. Short story shorter
>> - bad design.
>>
>> When you say something works once and then needs power cycle, all I'm
>> thinking of in latch-up condition. Could happen if you force output or
>> input above supply level. Is that inverter supplied from 12V too? Unless
>> the cap in the input is like 10uF or so. I'd put 100n max there.
>> Maybe try to replace the inverter with a transistor and leave the poor
>> pin 13 alone. You could even make whole reset conditioning circuitry
>> with one transistor.
>>
>> Roman
>>
>> W dniu 2024-06-22 o 00:01, denshi via Synth-diy pisze:
>> > im trying to add a reset to a CD4520 but running into an issue:
>> >
>> > in the TKB serge uses a CD4520 to handle the vertical clock (cycling
>> > between four vertical rows of pots)
>> > here is a relevant snippet of the schematic (as found on hyperreal)
>> > i copy and pasted the clock input to use as the “vertical reset” and
>> > am sending that to an inverter to the bottom half reset - it works,
>> > but only once, and then not again until i power cycle. am i missing
>> > something simple here?
>> >
>> > Inline image
>> >
>> >
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>
>
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