[sdiy] Adding reset clock to CD4520

[Pete Hartman]

I have an opinion, I will let the more experienced shoot me down if I'm
wrong (and will learn from the experience!)

I've seen CMOS sequencing circuits where you needed pull ups or pull downs
*at the chip* to make them behave well.  You'll note that you do have the
pull up on the clock directly connected to the chip.  Since the reset is
active high, I would put another pull up resistor on the other side of that
inverter, or possibly simply use another transistor stage wired in the same
way as an inverter, to drive the reset pins.  (in other words, instead of a
chip inverter, another transistor with the signal from the previous
collector going to the new one's base, same pull up, same ground on the
emitter, and connect the collector/resistor junction to the reset pins).

I'd say it's at least worth a test....

Pete


On Fri, Jun 21, 2024 at 5:43 PM Didrik Madheden via Synth-diy <
synth-diy at synth-diy.org> wrote:

> What are you using for the inverter? What value for the capacitor? Is the
> first and second input pulse identical?
>
> Have you worked your way backward and seen how far your pulse goes before
> disappearing, if it does? Do you have a pulse before/after the inverter?
>
> /Didrik
>
> On Sat, 22 Jun 2024, 00:06 denshi via Synth-diy, <synth-diy at synth-diy.org>
> wrote:
>
>> im trying to add a reset to a CD4520 but running into an issue:
>>
>> in the TKB serge uses a CD4520 to handle the vertical clock (cycling
>> between four vertical rows of pots)
>> here is a relevant snippet of the schematic (as found on hyperreal)
>> i copy and pasted the clock input to use as the “vertical reset” and am
>> sending that to an inverter to the bottom half reset - it works, but only
>> once, and then not again until i power cycle. am i missing something simple
>> here?
>>
>> [image: Inline image]
>>
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