[sdiy] Signals leaking into the PSU?

[A.M. Barrio]

So, I did the following:

   - Added one 100uF cap between each rail and GND on the busboard (on the
   closest connector to the PSU wires). That's the biggest value I could fit
   on the bus board, I had some 470uF but they were axial and had no space for
   them. Do you recommend a value larger than 100uF? If that's the case I'll
   buy some radials.
   - Breadboarded one VCO following the schematic attached. I added the
   10uF caps between rails on the LFO board as well.
   - Tested it again. This time the wiggle from the LFO was hardly
   noticeable at the outputs of the regulators. However, although it had been
   reduced, the change on the VCO output frequency was still distinguishable
   on the scope and could definitely be heard.
   - And finally, removed the LEDs from the LFO. This is what did it, it is
   finally working as intended, no wiggling on the VCO output nor LFO remnants
   on the rails. I will look into high efficiency leds, driving them through
   current sources and ways to stabilise the amount of current they draw.

Many thanks again guys, you made it very easy for a beginner like me to
understand the issue :-) If you feel like adding anything else to the
topic, please do so! I'll be glad to read, I've learnt so much from this
thread.

Kind regards,

A.M. Barrio.

 vco1.png
<https://drive.google.com/file/d/1O6NkuBz6gKZGsou1AdJfsE4TkF1un0Fb/view?usp=drive_web>



On Mon, Feb 20, 2023 at 6:10 PM A.M. Barrio <albertomunozbarrio at gmail.com>
wrote:

> Hello again,
>
> First off I'd like to show how appreciative I am about all this technical
> support, I wasn't expecting such extensive and informative answers! (and
> quick too...). I'll try to answer to everything that's been talked about
> here:
>
>
>    - To David Huss, René Schmitz, Lukas Hazen-Bushbaker: thanks a lot for
>    your thorough explanation on why this is happening. At least I can say I
>    now understand what's going on. David's bucket analogy in particular made
>    it super easy for me to grasp the idea. In the process, though, you also
>    gave me a feeling that these matters might be a little too complicated for
>    me to manage haha! I'm no engineer nor do I have as much knowledge on
>    electronics as I'd like to... I actually do have some, I work as a
>    technician repairing stuff, but the reasons behind my problem and the
>    solutions to it caught me off guard. I was never taught too much on noise
>    issues back when I was studying, I suppose it is explored more deeply in
>    actual EE degrees. As a result I've never been aware of it: there are no
>    100uF caps anywhere on the entire synth case, my bus board is the
>    crappiest, most DIY thing you can think of and my way-to-go has always been *slap
>    in those 100nF caps between rails and go test it!* So much for me to
>    learn on this topic.
>
>
>    - To René Schmitz, Roman Sowa: I must note that the schematic I
>    attached on the first email is not the LFO, but the clock, that's my bad
>    again. That's why there's only one LED. However I just noticed that I
>    didn't rectify the signal before plugging it to U1C, so the negative cycles
>    are indeed going nowhere. I will change that in the clock circuit. On the
>    LFO circuit I do have two LEDs per wave, one for positive cycles and one
>    for negative cycles. Took notes about high efficiency LEDs as well, right
>    now I'm using a plain common red LED on the clock and six green (!) LEDs on
>    the LFO, since it has three wave types. I'm still concerned about the LEDs
>    however... a total of 7 LEDs might take around 140mA, would that be
>    correct? Even if I were to correctly bypass all my circuits and properly
>    isolate everything, would the LEDs still suppose an issue in terms of
>    sag/wiggle for a PSU that can supply much more? (all of the PSUs I tried
>    with can supply around 1A max).
>
>
>    - To Mike Beauchamp, Chris McDowell, Roman Sowa: The VCO design comes
>    from Moritz Klein's one. I'm attaching a schematic of the exact circuit I'm
>    implementing. After reading all the responses it is quite obvious to me
>    that it is VERY prone to changes in output frequency: the CV pots are tied
>    directly to the rails, as well as the CD40106 IC in charge of generating
>    the oscillation. Roman, I am taking absolutely no offense from your
>    comment: it is indeed a bad design. I am not willing to improve *this*
>    particular VCO design as it was just a test and a bad example of me being
>    too excited to have my first panel mounted on my case. Please ignore the
>    wasteful use of the 40106 and the crappy expo converter, much more care
>    will be put into the next VCO I put together. About this: * If you
>    need help deciding which ones those are, post the VCO schematics.*
>    Would you mind pointing them out? I mentioned a couple spots above, but I'd
>    like to make sure I cover them all. That being said, I'd love to hear about
>    the reference voltages. Chris, thanks for the IC examples, I'll check them
>    out. Besides, I have some spare 7805 regulators at home. Although they are
>    quite big, would they do the job for testing before I go ahead and grab
>    some of the examples you mentioned?
>
>
>    - To Ian Fritz: Thanks for welcoming, and that's a good sense of
>    humour you've got :-). I can only show my respect to you guys, you really
>    seem to be very knowledgeable people.
>
>
> So, to summarize: I must look for a way to improve my bus board (uh
> consider spending some money on a proper PSU/bus board). I must plug 100uF
> to 470uF caps between each rail and GND on every module as well as the bus
> board. 100nF caps between each IC and GND are recommended. Sensitive parts
> of circuits should never be tied directly to the power rails, but to a
> voltage regulator instead. Would these measures remove (or at least notably
> reduce) the problem I'm facing?
>
> Thanks a lot beforehand,
>
> A.M. Barrio.
>
>  VCO.png
> <https://drive.google.com/file/d/1EBAwnrlCLTUUEoa8b8sTuSTGzpBY5-kL/view?usp=drive_web>
>
> On Sun, Feb 19, 2023 at 5:21 PM A.M. Barrio <albertomunozbarrio at gmail.com>
> wrote:
>
>> This is the complete email I wanted to send. There's another thread where
>> the attached files and additional info is missing. My bad, pressed CTRL +
>> Enter by mistake whoops. Please ignore that one! pata at ieee.org and
>> mbryant at futurehorizons.com, thank you for your replies, I have taken
>> them into account :-)
>>
>> ------------------------------------
>>
>> Hello,
>> I'm having an issue where the frequency of my VCO is being affected by
>> the operation of other modules. I'll give a broader explanation:
>>
>> I'm a beginner on synth DIY, right now I have my home made case, a PSU,
>> two VCOs, an LFO, a clock module and an amplifier/speaker (built in the
>> case, not externally). Everything has been arranged by me, I haven't
>> purchased any module yet. The clock and the LFO are the latest modules I
>> have built (pretty much both at the same time), and when I tested them on
>> their own, they worked just fine. However I noticed that when they are
>> powered, the frequency of the VCO would stutter following the operation of
>> the clock and the LFO.
>>
>> That would be: *without connecting the clock or the LFO anywhere*, just
>> having them powered up, whenever the clock is up or down, or the waves
>> generated by the LFO reset, the frequency of the VCO varies a tiny bit. It
>> gets more noticeable the higher the pitch of the VCO.
>>
>> After some head scratching I've realised that the signals generated by
>> any of the modules I have (both VCOs, the clock and the LFO) are somehow
>> leaking into the +12 and -12 rails of my PSU. Measuring any of the rails on
>> my scope (on AC mode, so only the noise is shown), I can see that the waves
>> generated by the modules I mentioned above are there as well in the form of
>> noise (around 20mVpp each of them). That explains the little variations in
>> frequency of the VCO. However I have no idea why this is happening or how
>> to fix it. I have tried with different PSUs I have around:
>>
>>
>>    - 11V 0.750A SMPS into DCDC to get +12 and -12
>>    - Two 12V 1A SMPS together to get +12 and -12
>>    - Linear PSU with 7812 and 7912
>>
>> I have the same problem with all of them. I'm positive there's an issue
>> somewhere with a lack of filtering, but I don't know where, or why.
>>
>> I'm attaching a sample of the VCO output where the stutter can be heard
>> and the schematic of the LFO. The way the LFO is set up in terms of caps
>> and isolation can be extrapolated to every other circuit I have made, I
>> always place those 100nF caps between each rail and ground.
>>
>>
>>  LFO (square).jpg
>> <https://drive.google.com/file/d/1ts1WGcyl2y1Ypp5eP79Ptb5fHXawetZh/view?usp=drive_web>
>>
>>  VCO stutter.mp3
>> <https://drive.google.com/file/d/1RrUNX_Of_RGLAwn2CyV7I5fxRrlHvfHL/view?usp=drive_web>
>>
>>
>> In case you have any idea what could be wrong, your reply will be greatly
>> appreciated. Thanks beforehand!
>>
>> Kind regards,
>>
>> A.M. Barrio.
>>
>> ------------------------------------
>>
>> In response to pata and Mike Bryant:
>>
>>    - Yes, the current PSU I'm using can provide 8W in total. I'm only
>>    powering one VCO and one LFO with some LEDs, power shouldn't be the issue
>>    in this case.
>>    - I always place 100nF caps between each rail and GND on every
>>    circuit/board. However I hadn't heard of placing caps on each IC. I suppose
>>    it should be between their power pins and GND? I will have a look at
>>    capacitance multipliers as well as I haven't heard about them before.
>>
>>
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