[sdiy] Generating a large number of CV outputs

Mattias Rickardsson mr at analogue.org
Sun Dec 10 13:03:30 CET 2023


Den sön 10 dec. 2023 00:52brianw <brianw at audiobanshee.com> skrev:
>
> Personally, given the long history of DAC and CODEC designs, I strongly
recommend against designing your own converter. These filtered pulse
solutions have much longer settling times than the 8-nanosecond setting
time of that 125 MHz current output DAC (from Texas Instruments).

Here you only mean for mux-ing applications I presume? That's where it's
important with fast settling.

If you'd build a multi-channel DAC using an FPGA, the settling behavior of
your homebrew solution wouldn't be as much of a problem.

/mr

PS: on the topic of strangenesses in emails, what's the cause of the
inserted  [exclamation point + newline + whitespace]  in long paragraphs?
See:


... as a message comes in, rather than a DAC that needs a continuous data
> stream (usually fed from a waveform buffer). DAC chips that operate on a
> fixed sample rate require a clock signal as part of the serial bus that
> they use, whereas DAC chips that are flexible about fixed or variable
> sample!
>   rate do not need a clock, per se, because they have a "convert" signal
> to load each new value. There is clearly some overlap in the design here,
> but the point is that you want to think about what the CPU is required to
> do to feed the DAC. In general, a DAC that is capable of variable...


... CODEC without each signal interfering with the other. But that's an
> example of way too many bits in each word and way too many data transfers
> per conversion to be an effici!
>  ent model. Your CPU will run out of power an order of magnitude faster
> with this approach.
>
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