[sdiy] Generating a large number of CV outputs

[brianw]

In my experience, multiple processors are not needed. I tend to select processors that support 20 MHz or 25 MHz on their SPI interfaces, and which have lots of DMA channels and hardware support so that no "bit-banging" is required at all. On one hand, I don't select Arm A-series processors that run in the GHz clock rates, so it's not that a lot of CPU is needed. Instead, M-series processors are sufficient so long as you plan for sufficient hardware peripheral support for the tasks needed. You don't need lots of processors or high CPU clock rates if you handle the heavy lifting in hardware.

I've found that PCB layout for 20 MHz SPI is easy. I was prepared to do lots of tuning to get the signal edges right, but the untuned circuit worked just fine. You definitely want to have the standard RC tuning designed into the PCB, just in case.

I agree that you'll want to calculate how long it takes to actually do a transfer. This can get quite detailed due to DAC settling times, MUX address setup and switching time, ... but also the details of the serial transfer are important.

e.g. I had one design with 16 channels of ADC across two 8-channel ADC chips. The maximum sample rate was 1 MHz, and that meant 125 kHz per channel and two SPI ports. This was 12-bit ADC, with a 16-bit control word. I almost forgot to account for the gap between samples on the SPI interface that accounts for 1 bit cell, so the minimum SPI rate for my data was 18 MHz, and the maximum rate for that DSP chip's SPI ports was 20 MHz, so the design just barely fit. I had calculated 16 MHz SPI clock but didn't realize there was a gap between words due to the SPI mode, and I was lucky that the hardware would bump up to 18 MHz without exceeding the limits. Moral: Look at all the details, and allow for prototyping to find anything you've missed!

Brian W.


On Dec 7, 2023, at 5:02 PM, Jay Schwichtenberg via Synth-diy <synth-diy at synth-diy.org> wrote:
> You are probably going to have to have a master to set everything up and multiple processors to output stuff in parallel.
> 
> Figure out which interface you are going to use. Probably SPI or I2C, even though a lot of SPI interfaces run at 50 MHz it's going to take PCB rocket science to get it to work that fast.
> 
> Then pick your chips you're going to use.
> 
> Last thing is do a calculation to figure out how long it actually takes to do a transfer.
> 
> Jay S.
> 
> On 12/7/2023 4:35 PM, Danjel van Tijn / intellijel wrote:
>> What is the current ideal way to generate a large number of CV outputs from a single CPU?
>> 
>> Let's say I wanted to generate 100 outputs with an update rate of a few kHz and an equivalent bit depth of 12 or 16 bits.
>> 
>> I know that back in the day when DACs were extremely expensive, the designs would use a single DAC and then demux to a bunch of S&Hs.  
>> 
>> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel DACs? 
>> 
>> Or would it make more sense to use an FPGA and create a giant multi-channel 1-Bit DAC?
>> 
>> Looking at some Elektron hardware teardowns it appears that they are using the latter approach.