[sdiy] Generating a large number of CV outputs

Sat Dec 9 02:25:30 CET 2023

That's really good performance. What do you think of its medium (~1
Hz) and long term (~0.01Hz and less) drift performance?

What do you think makes a good integrator in such a case?

On Sat, Dec 9, 2023 at 2:06 AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
>
> The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 08 December 2023 23:18
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> Right, that makes sense. Thanks a lot guys!
>
> So what was that about using jitter? Is that to make the integrator
> "more perfect"?
>
> If instead of using single pulses you used BLEPs or something similar,
> could that help as well? Or some sort of linear interpolation that
> outputs two samples in succession (so that their sum is 65535) in some
> smart way ...
>
>
> On Sat, Dec 9, 2023 at 12:09 AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> >
> >
> > ________________________________
> > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > Sent: 08 December 2023 22:49
> > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > Cc: SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Does that mean the final output voltage (after the reconstruction
> > filter) is proportional to the freq value in the algorithm Tom posted
> > above? So you set the desired output value by setting the freq
> > variable?
> >
> > On Fri, Dec 8, 2023 at 11:47 PM Ben Bradley via Synth-diy
> > <synth-diy at synth-diy.org> wrote:
> > >
> > > I get it. Firstly, it's an NCO:
> > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > one cycle at the max frequency) for every cycle of output, thus the
> > > average voltage (the output of a low-pass filter) is proportional to
> > > frequency.
> > >
> > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >
> > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > >
> > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > >
> > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > >
> > > >
> > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >
> > > > > I don't get it. Most of the algorithm is missing.
> > > > >
> > > > > On Fri, Dec 8, 2023 at 10:07 PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >>
> > > > >> On Fri, Dec 8, 2023 at 5:06 PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > >>
> > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > >>
> > > > >>
> > > > >> That's not what I meant when I said PDM, certainly.
> > > > >>
> > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > >>
> > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > > >> I've read this a few times but I'm struggling to understand what's
> > > > >> going on. Can someone type out an algorithm or something like that?
> > > > >> Would appreciate it a lot. Thanks.
> > > > >>
> > > > >>
> > > > >> Ok, it'd look something like this:
> > > > >>
> > > > >> phase: 16-bit variable (for example)
> > > > >> freq: 16-bit variable (same as phase)
> > > > >>
> > > > >> So we do:
> > > > >>
> > > > >> // Increment phase accumulator
> > > > >> phase = phase + freq
> > > > >>
> > > > >> // Did phase wraparound?
> > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > >> // Ok, phase wrapped
> > > > >> phase = phase % 65536
> > > > >> // output a pulse a single clock in length
> > > > >> <this is implementation dependent!>
> > > > >> }
> > > > >>
> > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > >>
> > > > >>
> > > > >> There's a page about NCOs in general on my website:
> > > > >>
> > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > >
> > > >
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