[sdiy] Generating a large number of CV outputs

[Mattias Rickardsson]

But what about potential problems and errors from

1 - the non-constant number of transitions per time?

2 - the non-constant frequency of the pulse wave?

/mr


On Fri, 8 Dec 2023 at 17:02, Tom Wiltshire <tom at electricdruid.net> wrote:

>
>
> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
> synth-diy at synth-diy.org> wrote:
>
> If PDM means PWM with bit-reversal before the comparison (such as Richie
> describes), then it does indeed lock you into a lower sampling rate, and
> that's one reason I skipped describing *that* technique.  But PWM with
> bit-reversal seems not to be what you mean when you say PDM.
>
>
> That's not what I meant when I said PDM, certainly.
>
> The way I generated it is using an NCO. The NCO generates a single-shot
> output pulse everytime the phase accumulator wraps.
>
> Now consider what happens with a simple 8-bit NCO. If our frequency
> increment is 2, for example, we get a single output pulse every 128 clocks,
> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
> not next to each other like PWM. The output frequency would be (clock
> frequency / 128) in this situation.
> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per
> 256 clocks, and again, they're nicely spaced out. The output frequency is
> now up to (clock /32) so there's been a big improvement, just by getting
> away from those extreme values a little bit.
> As the increment climbs, the accumulator wraps more and more often. At
> freq=128, every other clock is an output and we reach our maximum output
> frequency of (clock/2). As the increment goes above half, we start staying
> high for more than a single pulse, and the waveform effectively turns the
> other way up and we get a mirror image of the effect we've seen from 0-128.
>
> HTH,
> Tom
>
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