[sdiy] Buchla 295 10-band comb filter topology

[brianw]

On Nov 25, 2022, at 3:46 PM, brian wrote:
> On Nov 25, 2022, at 2:14 PM, Mike Bryant wrote:
>> What I did was put a 4*4 multiplier in a 256x9 ROM with a carry bit and addressed it through some 4/8/12 bit shifters multiple times.  Saves a lot of single bit shifting.
>> 
>> Whatever happened to x9 memories - used to be commonplace back then.
> 
> Ha: The 8-bit standard happened ... that's what!

My brain was fixated on vintage 9-bit CPU designs, and I almost completely forgot 9-bit memories with parity!

Yes, there were 9-bit memory chips designed for 8-bit systems, where the 9th bit automatically was set to the parity of the incoming value on write, and was checked for proper parity when reading. This was in the age when nobody had yet figured out how to stop cosmic rays from flipping bits and causing data errors at random. It used to be necessary to allocate this 12.5% extra in memory just to avoid using bad data without warning.

One of my EE professors told the story of one memory company discovering that the equivalent of Scotch tape backing material was enough to shield against interference from cosmic rays. They quietly added this to their DRAM chips, above the die, and watched everyone else go out of business. Proprietary knowledge, indeed!


Meanwhile, a different answer to your question is:

Modern FPGA chips sometimes have 9-bit or 18-bit DRAM configurations. These "extra" bits are intended for parity, but being an FPGA they can actually be used for anything. The Dangerous Prototypes 16-channel logic analyzer is built on a single FPGA, and it uses the extra bits for compression of the data to increase storage time.

Although an FPGA is a *very* expensive DRAM, if you need the FPGA for the rest of your design then you might get the 9-bit memory for free.

So, make that *two* things I forgot when first responding to your question.

Brian