[sdiy] Using dual BBD chips for higher clock frequency

Richie Burnett rburnett at richieburnett.co.uk
Sat Jun 25 12:25:38 CEST 2022


The BBD with fixed-length and variable- sample-rate does respond to modulation differently to a fixed-rate variable-length delay. There's a DAFX paper about this, and others too from what I can remember. Our very own Tom Wiltshire also did an excellent analysis of how a BBD responds to modulation. Although it stopped short of specifically discussing how to model this digitally in a fixed sample-rate system.

>From my experience it's not hard to model a short BBD with slow gentle modulation using a variable-length digital delay and fixed sample-rate. You can get very close to a typical BBD chorus effect with a fixed rate DSP with the right IIR filtering, etc. However...

It's the cases with a longer delay and deep, fast modulation that do the interesting stuff! This is harder to model digitally because the modulation changes whilst the signal is still shuffling through the buckets of the BBD! One paper suggested using a standard fixed rate digital delay-line for the audio alongside a "virtual BBD" that stored time-stamps of when the virtual bucket's samples were taken rather than actual audio data. The appropriate output samples could then be generated by using the time-stamps to extract values from the fixed-rate delay using interpolation. I haven't tried it but think I understand how it works!?

-Richie,

---- brianw wrote ----

>I don't know whether any company ever shipped a BBD-based product that clocked high enough to even get 20 kHz bandwidth, much less 500 kHz. Most BBD products have less than full bandwidth, such that even us old folks can hear the loss.
>
>The MAX1326 ADC clocks up to 526 kS/s and is 14 bits.
>
>The ADS7951 ADC clocks up to 1 MSPS and is 12 bits.
>
>The THS5671 DAC clocks up to 125 MSPS and is also 14 bits.
>
>I've long been curious about how much of a factor the continuously-variable sample rate of a BBD (or non-audio CODEC) is compared to the sound of a fixed-sample-rate digital design (even with software SRC to simulate variable sample rates). i.e. I wonder if the 'sound' of a BBD isn't its analog nature, or the sample rate, per se, but the fact that the sample rate changes are continuous.
>
>Brian
>
>
>On Jun 16, 2022, at 6:01 PM, Jay Schwichtenberg via Synth-diy <synth-diy at synth-diy.org> wrote:
>> Isn't one of the advantages of using a BBD over a digital solution is the clocking can go to 500 KHz to 1MHz?
>> 
>> So depending on the clock freq you can get the aliasing filters higher up and have better freq range.
>> 
>> Jay S.
>> 
>> On 6/16/2022 4:38 PM, Tom Wiltshire wrote:
>>> On 16 Jun 2022, at 23:11, Mike Bryant <mbryant at futurehorizons.com> wrote:
>>>> You could add more BBDs in parallel and sum the outputs to reduce it again.
>>> I think this is what's referred to in the SAD1024 datasheet. That chip was actually a dual 512-stage device, and one suggestion was to use the two delay lines in parallel for reduced noise. I don't remember the details. Could be that simply summing the signals gives you a +6dB boost in the signal, but not so much in the noise, or it could be that it recommended a differential signal. Can't remember, sorry. I found an "Archer"-branded version of the datasheet here which shows various possibilities:
>>> 
>>> http://www.pmerecords.com/Docs/Archer_SAD-1024_Tech_Data.pdf
>>> 
>>>> If lowest clock speed is 20k, you really need to be filtering out everything about 10k.
>>> BBD datasheets generally recommend a conservative bandwidth of 1/3rd of the clock frequency, so 20K would be 6.67KHz. Poor, but much better than 3.3KHz!!
>>> 
>>> I totally agree that 18KHz filtering with 20KHz clock is not realistic. No practical filter is that sharp.
>>> 
>>> Tom
>
>
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