[sdiy] Using dual BBD chips for higher clock frequency

Vladimir Pantelic vladoman at gmail.com
Sat Jun 25 09:20:46 CEST 2022


exhibit A: Joranalogue Delay 1

quoting the manual:

11 HIGH FREQUENCY INPUT AND OUTPUT

While Delay 1 is normally driven by its own highfrequency (HF) VCO,
creating the ‘clock’ signal required to drive the bucket-brigade delay
chip, it is possible to use an external signal to override the internal
delay time control. Simply plug the signal into the HF input. For the best
results, this should be a square wave with a 50 % duty cycle and a voltage
swing of at least 0 to +5 V. The recommended frequency range is 20 kHz to 1
MHz. Below this range, longer delay times can be achieved, but the clock
will become audible as a high-pitch whine. Frequencies above this range
enable extremely short delay times, but with poor audio fidelity. To keep
noise and distortion to a minimum, a high-stability clock source is
required....



On Sat, Jun 25, 2022, 07:27 brianw <brianw at audiobanshee.com> wrote:

> I don't know whether any company ever shipped a BBD-based product that
> clocked high enough to even get 20 kHz bandwidth, much less 500 kHz. Most
> BBD products have less than full bandwidth, such that even us old folks can
> hear the loss.
>
>
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