[sdiy] Can google's free* 180nm OSHW foundry be used for synth parts?

[cheater cheater]

Bear in mind the Google program is a shuttle program so as I
understand it that means your design shares the wafer with other
people's. I think that means whatever process you'll be using is
common to all of those chips so you probably can't ask for a special
process, but I don't know.

On Sat, Aug 6, 2022 at 11:18 PM usenet at teply.info <usenet at teply.info> wrote:
>
> On 06.08.22 15:18, cheater cheater via Synth-diy wrote:
> >
> > A friend who works at a semiconductor fab told me that the process
> > might not support bipolar transistors (he just doesn't know if it
> > does), but I'm not sure how necessary those are for the purpose of
> > creating audio chips?
> >
> As far as I can see after having a *VERY* short look at the open source
> PDK on github, this process seems to be plain MOS. If it had "proper"
> Bipolars integrated, it would be called BiCMOS.
> *AND* the mentioned 10V devices seem to be LDMOS, so they will support
> 10V operation only at drain-source, gate-source likely will be limited
> to much less, probably around 2.5V maximum, maybe even less.
> *IF* you know what you're doing, one could use some parasitic Bipolars
> intrinsic to how the MOS device is done, but their performance will be
> very poor in about every regard you could think of:
> Current Gain? *VERY* low. Probably will be below 10 (yes, ten, but more
> likely something smallish single-digit. I wouldn't bet on more than
> maybe 3...)
> Breakdown Voltage? low, probably less than 20V.
> Reproducability? poor, even though matching on a chip should be
> reasonable, you'll never know if the next batch will come out the same...
> AND: no simulation models, no ready-to-use schmatic or layout elements,
> no LVS (Layout-versus-schematic) verification, probably no support for
> Design Rule Check, so likely a bunch of design rule violations which
> might even cause rejection of the design.
>
> But: I'm not too familiar with GlobalFoundries process offerings, it
> might be that they also have 180nm BiCMOS available, and that might even
> be compatible with the 180MCU open source offering. But that I can't
> tell with what I have avalable.
>
> So in total, I'd say it would be a lot of work, probably a few design
> respins *AND* a bunch of luck to get something out of it that's useful
> for SDIY purposes besides the obvious digital parts the process has been
> optimized for.
>
> Bests,
> Florian
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