[sdiy] Can google's free* 180nm OSHW foundry be used for synth parts?

[Eric Brombaugh]

On 8/6/22 14:14, usenet at teply.info wrote:
>>
> As far as I can see after having a *VERY* short look at the open source 
> PDK on github, this process seems to be plain MOS. If it had "proper" 
> Bipolars integrated, it would be called BiCMOS.
> *AND* the mentioned 10V devices seem to be LDMOS, so they will support 
> 10V operation only at drain-source, gate-source likely will be limited 
> to much less, probably around 2.5V maximum, maybe even less.
> *IF* you know what you're doing, one could use some parasitic Bipolars 
> intrinsic to how the MOS device is done, but their performance will be 
> very poor in about every regard you could think of:
> Current Gain? *VERY* low. Probably will be below 10 (yes, ten, but more 
> likely something smallish single-digit. I wouldn't bet on more than 
> maybe 3...)
> Breakdown Voltage? low, probably less than 20V.
> Reproducability? poor, even though matching on a chip should be 
> reasonable, you'll never know if the next batch will come out the same...
> AND: no simulation models, no ready-to-use schmatic or layout elements, 
> no LVS (Layout-versus-schematic) verification, probably no support for 
> Design Rule Check, so likely a bunch of design rule violations which 
> might even cause rejection of the design.
> 
> But: I'm not too familiar with GlobalFoundries process offerings, it 
> might be that they also have 180nm BiCMOS available, and that might even 
> be compatible with the 180MCU open source offering. But that I can't 
> tell with what I have avalable.
> 
> So in total, I'd say it would be a lot of work, probably a few design 
> respins *AND* a bunch of luck to get something out of it that's useful 
> for SDIY purposes besides the obvious digital parts the process has been 
> optimized for.

I'd tend to agree with all these points. I've been following along some 
of the MPWs that have come out of the Google effort so far and there 
have been a number of failures due to poorly scaled parasitics in the 
models that caused hold-time violations which rendered entire wafers of 
chips barely functional. The open source EDA tools they're using are 
fairly complex, memory hungry (you'll be happiest with 64GB RAM running 
them) and behind the curve with respect to what the pros are using.

There are some ambitious folks out there who are attempting to design 
analog functions, but most I've seen are geared towards RF applications, 
not audio-frequency stuff and as far as I can tell none of them are 
working particularly well yet. Additionally, although you will get quite 
a lot of parts, the resulting chips are all provided in high-density CSP
packages that are most definitely *not* DIY friendly.

Overall, if you're doing digital stuff these open source chip processes 
will probably be a great way to learn IC design and maybe even produce 
some useful parts if you're lucky enough to get some that work, but 
don't expect anything that would be practical for audio and analog 
projects in a DIY environment.

Eric