[sdiy] Issue with CD4024 Ripple Counter

[David G Dixon]

Hello Harry,
 
I tried it.  It had no effect.  I'm now putting together Tim's test circuit
on a breadboard to see if that works.
 
Cheers,
Dave

  _____  

From: Mr&MrsAccount [mailto:hbissell at wowway.com] 
Sent: Monday, September 20, 2021 7:03 PM
To: David G Dixon
Cc: synth-diy at synth-diy.org
Subject: Re: [sdiy] Issue with CD4024 Ripple Counter


[CAUTION: Non-UBC Email]	
Although this sort of defies conventional wisdom, I've often fixed CD4024
(and other 4000 series clocked circuits) with a small capacitor from the
clock
input to ground.   I suspect I had some noise or glitch around the trigger
point and this damped out the anomaly.

It might double clock, or triple clock etc. on a noise at the transition
point.

We are talking maybe 15 - 50pf or so...

Another issue is counters that have "schmitt trigger" on the inputs.  One
manufacturer used a schmitt trigger as the input stage (right) and another
who cloned the chip used an ordinary logic buffer ~followed~ by a schmitt
trigger as the second stage.  So it the first gate screws up and
multi-clocks the schmitt trigger makes the rise time of the defective clocks
even faster (what were they thinking?).   Today there might only BE one
manufacturer...  To bad 4000 series was one of my favorite families of all
time.  But with sub 5V supplies it's no longer good...

Harry

----- Original Message -----
From: David G Dixon via Synth-diy <synth-diy at synth-diy.org>
To: synth-diy at synth-diy.org
Sent: Mon, 20 Sep 2021 21:18:58 -0400 (EDT)
Subject: Re: [sdiy] Issue with CD4024 Ripple Counter



Just for Ss and Gs, I thought I'd show you 
my layout graphic for the ASR board which has the clock circuit on it.  
Please see attached.  Note that red traces are the +V rail 
and green traces are the GND rail (and black traces are the -V 
rail).  The CLOCK pin of the 4024 is connected to the light blue 
trace.  I've also attached what I call the "Build" picture, which is what 
the board actually looks like.  Finally, I've attached a picture of the 
actual board.  Note that there is another circuit board that this one plugs 
into, which has a DG333 and comparators for controlling the "Shift/Bypass" 
switches on each ASR channel electronically.  That's what the 3- and 4- pin 
headers plug into.  The 4-pin header passes through that board and connects 
to the Panel PCB.  This is where the clock signal comes in and out of this 
board.
 
The rail traces are a bit thicker than the 
other traces.  You will notice that the ground traces do not connect to 
each other across the top of the board, so that the ground at the 4024
actually 
comes up from the bottom.  I just tried jumpering the two ground traces 
temporarily with alligator clips and it had no effect (and why should 
it?).
 
Also, I should mention that when the ASR is 
being clocked by an external LFO, the CD4024BE is clocking on the positive
edge 
only.  However, when the Manual clocking switch is used, the CD4024BE is 
clocking on both edges.  The clock signal at the CLOCK pin looks identical 
in either case.  The manual clocking switch is connected to the +V and GND 
rails, and is fed to the comparator through a 1k resistor, whereas the clock

input jack is connected through a 10k resistor.  Why any of this should 
have an effect is beyond me.  This, for me, is now more or less in the 
realm of the supernatural, in terms of my ability to understand 
it.


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