[sdiy] Many SPI slave devices on the same PIC master BUS..
jpdesroc at oricom.ca
Tue Mar 2 03:03:04 CET 2021
I'm using a PIC16F1783 on a demo board
connected to a daughter board (solderless connections proto board)
for the external SPI devices.
And yes the MISO pin could be a problem here.
Maybe a little pullup (or pull down ) resistor (around 10k) on the MISO
pin of the master PIC could help..
So far I use a 23LC512 SPI SRAM with great success.
reading/writing to it easy on all the 65536 addresses.
But I'm experiencing kind of 'jitters' on the received bytes
when I add one or 2 other SPI devices (each have their own CS pulses).
One MAX11100 ADC and one LTC2641 DAC to name them..
I run the SCK at 4Mhz (250ns pulse period).
The jitters could be from my actual code..
I have to check that.
De : Brian Willoughby [mailto:brianw at audiobanshee.com]
Envoyé : 1 mars 2021 20:32
À : Jean-Pierre Desrochers
Cc : synth-diy at synth-diy.org
Objet : Re: [sdiy] Many SPI slave devices on the same PIC master BUS..
I don't think there should be a strict limit. Any fan-out issues could be
handled by buffer/drivers on MOSI and SCK, although MISO would be difficult
unless the drivers were tri-stated by the same Chip Select used for each
I seem to recall designing with as many as 3 SPI slave devices on a PIC,
maybe even 5.
I think you'll want to 'scope all three bus signals to look at the edges,
and to decide whether a boost from a driver is needed.
Which PIC part number are you using? The data sheet should have a chapter on
the pin electronics specific to SPI.
On Mar 1, 2021, at 16:55, Jean-Pierre Desrochers wrote:
> Did anybody used in the past as much as 6 x SPI slaves devices driven
> by the same micro master bus (MISO, MOSI, SCK)?
> Obviously one at the time and each of them having their own separate Chip
select pulse ?
> I cannot see anywhere if there is a limit for SPI slaves sharing the
> same bus (loading, fan out..)
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