[sdiy] Nanosecond delays - the clean or dirty method?

[Roman Sowa]

I like the idea of adding simple RC. That's what the application calls 
for. No need for anything more fancy IMHO.
Maybe adjust it a bit so instead of 1k5/22p use 3k/10p, or even 10k 
without any capacitor.
The FRAM chip does not need super sharp edges at CE pin, does it?

Roman
who uses dual Schmitt inverters in SOT363 package

W dniu 2021-02-26 o 17:41, Steve Lenham pisze:
> On 26/02/2021 15:22, MTG wrote:
>> You can buy single gates in SMD. Not sure about every possible gate, 
>> but I wouldn't be surprised. Hand-soldering-wise they are easy to 
>> work with. You could drop one on a tiny (SIP?) adapter PCB if you 
>> really wanted to. Or maybe do an SMD version of the gate(s) lined up 
>> as you mentioned originally.
>>
>> GB
>
> Thanks. I've got no objection to adding another gate or two, or any 
> practical problem implementing it if necessary. I just wanted to know 
> whether people thought it was the ONLY acceptable approach, i.e. 
> whether or not the RC delay was beyond the pale!
>
> Cheers,
>
> Steve L.
> Benden Sound Technology
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