[sdiy] ADc & DAC voltage dividers.. fixed resistors values finally..

Roman Sowa modular at go2.pl
Wed Feb 17 08:00:50 CET 2021

That's why I mentioned altering gain resistors to have relation like this:
0-8V at jack  input means 0.02 - 4.98V at ADC input. That's comfortable 
range for any RR opamp.

But there's a catch- all RRIO opamps exhibit a jump in input offset when 
inputs are about 1V below positive supply. This is because switch 
between P-channel and N-channel input stages. This meay lead to few mV 
jump. To avoid that you may cheat a bit. Make the input attenuation even 
higher, say 2, and turn the ADC buffer into noninverting amplifier of 
gain 1.25. This way you will not reach this transition region. And it 
also opens wider selection of opamps to use. There are many RRO opamps 
but not all of them are RRIO.


W dniu 2021-02-16 o 17:56, Jean-Pierre Desrochers pisze:
> Good points Roman..
> But to me 5V rail to rail opamps will never reach 0 neither +5.0v
> at their output when these values show at the input..
> Close values but not the original ones.
> Or maybe I am wrong on that.
> That's why I used +/- 15 powered opamps BUT with 1N4148's
> on the output divider resistors going to the ADC..
> About the small negative and positive voltage headroom 'stretcher'
> that would effectively help on values around 0v and +5v  though.
> -----Message d'origine-----
> De : Roman Sowa [mailto:modular at go2.pl]
> Envoyé : 16 février 2021 04:25
> À : Jean-Pierre Desrochers; synth-diy at synth-diy.org
> Objet : Re: [sdiy] ADc & DAC voltage dividers.. fixed resistors values finally..
> Why not make R1=30k and R2=49.9k and skip U19A?
> Or to keep input closer to 100k make it 38k and 63.4?
> And I would rather use 5V rail-to-rail opamp as ADC buffer. You can never know if +/-15V powered opamp will not peak outside 0-5V during rapid powerup.
> Don't worry about any offsets as long as they are stable with low temperature drift. Overall offset will be corrected in firmware anyway.
> One more thing I would do is to alter the gains a little to have at least 8.1V or 8.2V working range in case all tolerances in the circuit will lead to lower range than expected. And also intentionally introduce some (20mV maybe?) negative offset at DAC buffer and same positive offset in ADC buffer. This will make sure working range of the system includes 0V. Without that it may be difficult to get closer than 5mV from 0 and we all know that even 0.5mV can be anoying, because that's about 30 times more than 1 LSB in CD audio!
> Roman
> W dniu 2021-02-15 o 18:22, Jean-Pierre Desrochers pisze:
>> Sorry, please forget the previous email..
>> The following circuit is what should be (D1,D2 displaced):
>> Here is a revised version of the ADC/DAC circuits according (I think)
>> to what has been suggested and pointed out such as:
>> ADC’s Input bias current vs driving opamp’s output impedance
>> Resulting in pour linearity of incoming CVs,
>> LPF bad results on ADC readings (R1 and former C1 removed cap ).
>> BTW, +5v reference will be from a REF02  0.2% precision and as shown
>> will drive both ADC/DAC.
>> OP275 seems to be a good choice for driving the ADC but I hope more
>> buffering 2 chained opamps won’t bring too much offset voltage to AIN
>> input here..
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