[sdiy] Why did this 100pF capacitor fix the SPI bus?

Neil Johnson neil.johnson71 at gmail.com
Tue Feb 16 17:15:49 CET 2021


Ullrich Peter wrote:
> Data is sampled on the Din pin at the negative edge. So maybe you have your SPI code for the positive edge then then capacitor helps to store your data for some microseconds so that it also works with the negative edge…

Yup! SPI has four modes of operation and you need to make sure both
ends are configured the right way:
https://www.allaboutcircuits.com/technical-articles/spi-serial-peripheral-interface/

The DAC8564 datasheet says:
> The 68HC11 should be configured so that its CPOL
> bit is '0' and its CPHA bit is '1'. This configuration
> causes data appearing on the MOSI output to be
> valid on the falling edge of SCK.

Suggest checking how the SPI peripheral is configured in the ATmega328.

Neil




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