[sdiy] ADc & DAC voltage dividers.. fixed resistors values finally..

Jean-Pierre Desrochers jpdesroc at oricom.ca
Mon Feb 15 18:22:59 CET 2021


Sorry, please forget the previous email..
The following circuit is what should be (D1,D2 displaced):

 





Here is a revised version of the ADC/DAC circuits according (I think)
to what has been suggested and pointed out such as:

ADC’s Input bias current vs driving opamp’s output impedance

Resulting in pour linearity of incoming CVs,

LPF bad results on ADC readings (R1 and former C1 removed cap ).
BTW, +5v reference will be from a REF02  0.2% precision
and as shown will drive both ADC/DAC.
OP275 seems to be a good choice for driving the ADC
but I hope more buffering 2 chained opamps won’t bring too much offset voltage
to AIN input here..

 

 

 

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