[sdiy] Digital accumulator VCO core?

Gordonjcp gordonjcp at gjcp.net
Wed Feb 10 09:38:43 CET 2021

On Wed, Feb 10, 2021 at 09:26:30AM +0100, cheater cheater wrote:
> DCO: a digital expo controls a digital circuit. circuit sends a reset
> signal to an analog accumulator, which is fed constant current. that
> analog accumulator is then shaped in analog.
> my idea: an analog expo controls an analog current. that current is
> variable. the current feeds a digital accumulator. the accumulator has
> a digital comparator.
> simplified:
> DCO: digital control of analog accumulator
> my idea: analog control of digital accumulator.

That sounds like you're creating the worst of both worlds.  The analogue expo won't be in tune, ever.

When you say "digital accumulator" and "digital comparator", do you mean something like

	phase = phase + theta
	saw = phase
	square = (phase > 50%) 

for theta being the "step" size between samples that you'd work out from sizeof(phase)*frequency/samplerate?

Because that is going to alias like hell.

Given that the expo just turns a relatively sane 1V/oct control voltage into a V/Hz control voltage - or really μA/Hz control current - you're using a difficult-to-make analogue circuit to make your control input harder to cope with.

If you look at how a practical DCO like the Juno 106 works, an expo lookup table in ROM drives a DAC, and another expo lookup table in ROM drives a digital counter, and you've got a squarewave off the counter that is used to reset the integrator which charges at a rate governed by the DAC.  In ROM you've got semitone steps and to get in between you use linear interpolation which gives just a few Hz error at the very top of the scale.

I'm not saying don't do it, I'm just saying that the analogue bit is a difficult bit that doesn't bring anything to the party.


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