[sdiy] Digital accumulator VCO core?

Mike Bryant mbryant at futurehorizons.com
Wed Feb 10 00:22:38 CET 2021


> Personally, I find it much easier to design with a part where I can write in a language that allows stepping through the code and quick iteration of ideas. Texas Instruments has JTAG interfaces that allow you to graph time domain and frequency domain > signals within the chip memory in real time. I'm not aware of tools for FPGA that allow so much debugging support.

> Brian

Actually with Matlab and Simulink you can debug complex DSP in FPGAs pretty quickly nowadays.  But I too prefer doing it in C++ on a more conventional processor.




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