[sdiy] Digital accumulator VCO core?

Eric Brombaugh ebrombaugh at gmail.com
Tue Feb 9 19:06:55 CET 2021

I did something like this back in early 2008 using a little Cypress 
PSoC. There's a full write-up of it here:


The basic concept was then converted to dsPIC and became the basis of 
several digital VCOs for Modcan and Synthesis Technology, then was 
further ported to STM32 for a few more designs.

The key notion is doing the expo conversion in software using bit shifts 
and lookup tables. With this approach it's possible to have excellent 
tracking across 10 octaves with only a 12-bit ADC. Pitch resolution with 
12-bits is about 3 cents which is slightly better than the commonly 
agreed human sensitivity of about 5 cents. A better ADC and higher 
resolution expo table would allow even better resolution.

Keeping the output sample rate reasonably high helps prevent simple 
wavetable generation techniques from aliasing too badly. As noted 
up-thread, waveforms like triangles and sines that don't have sharp 
transitions will be less affected by aliasing, but with greater CPU 
horsepower it's possible to do more advanced anti-aliasing for sweeter 
sounding saws and squares.

FPGA-based approaches mentioned earlier allow very high sample rates 
that reduce aliases into the noise floor. There are a number of newer 
FPGAs like the Lattice ice40 series that are inexpensive and can easily 
hit multi-MHz sample rates with full 16-bit resolution. Using 
all-digital PDM conversion techniques enables simple and low-cost output 
circuits with excellent audio characteristics. I've got an example of 
that here:



On 2/9/21 9:38 AM, Tom Wiltshire wrote:
> I found it in the end! (It had been bugging me that I couldn’t remember). It was Ryan Williams, on his "Homebuilt Hardware” site, now no longer:
> https://web.archive.org/web/20160315092902/http://www.homebuilthardware.com/index.php/projects/dspicvcdo/
> Tom
> ==================
>         Electric Druid
> Synth & Stompbox DIY
> ==================
>> On 9 Feb 2021, at 15:32, Richie Burnett <rburnett at richieburnett.co.uk> wrote:
>>> There was someone here some years ago who’d done a voltage-controlled oscillator on a dsPIC. The cunning part of that was that the output waveform was a triangle instead of a ramp. That massively reduces the aliasing problems...
>> Neat!  I wonder if you could take that process all the way and have the NCO output a sinewave (to remove all aliasing.)  Obviously you could easily use analogue electronics to derive a square wave from that with a comparator, but not sure how you could shape it into a triangle or sawtooth waveform!?
>> I guess it's all irrelevant really though as BLIT, BLEP, minBLEP, poly-BLEP etc, all work very well for directly generating the common analogue oscillator waveforms at 48kHz or 96kHz sample rates.
>> -Richie,
>> -- 
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