[sdiy] LTSPICE complete Moog 960 sequencer simulation !
Jean-Pierre Desrochers
jpdesroc at oricom.ca
Wed Sep 30 17:10:41 CEST 2020
Hi,
For those of you who'd be interested about the inner workings of the Moog 960 sequencer
I've done a complete LTSPICE simulation of all the original RTL logic IC's used in it.
Yes original RTL logic simulation !
Fortunately I found the RTL IC's descriptions (inside resistors & transistors connections)
And did a 'discrete' complete equivalent of all RTL IC's.
I also simulate the change of any SKIP/NORMAL/STOP rotary switches (one at the time)
While the sequence is running !
A specific circuit switch a register in real time to one of the 3 possible position
by placing a 0 or 1 to the 2 control input named CTL1 & CTL2.
Description : LTSPICE timings 20 - SKIP-NORMAL-STOP test circuit
Example: LTSPICE timings 13 - normal timings but Stage 3 in STOP then NORMAL then STOP
Description : LTSPICE timings 13 - normal timings but Stage 3 in STOP then NORMAL then STOP
A ZIP file is yours if interested. PM me if so.
Just unzip the files to a directory and run the simulation.
Around 20 lines of simulation shown.
Cheers !
Jean-Pierre Desrochers
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