[sdiy] Xpander

[mskala at ansuz.sooke.bc.ca]

On Wed, 21 Oct 2020, Rainer Buchty wrote:
> On Wed, 21 Oct 2020, mskala at ansuz.sooke.bc.ca wrote:
>
> > Reading RAM requires driving the address bus.  What happens if two
> > "receiver" CPUs want to read two different addresses on the same cycle?
>
> As I said: They don't communicate with each other.
>
> Why would one synth card read another's synth card RAM? Parameterization is
> done by the host.

I thought the situation we were discussing here was a single RAM, with a
single bus.  Each card has to read "another synth card's" RAM
whenever it reads RAM at all, because there is only one.

It sounds like you're describing a different scheme where each card has a
separate RAM - which is fine, but in order to use them simultaneously it's
also necessary to have a separate bus for addressing each.

-- 
Matthew Skala
mskala at ansuz.sooke.bc.ca                 People before tribes.
https://ansuz.sooke.bc.ca/