[sdiy] Capacitor type matters in 74HCxx one-shot circuit ?

[Brian Willoughby]

On Oct 9, 2020, at 7:59 AM, Didrik Madheden <nitro2k01 at gmail.com> wrote:
> Something else about the circuit however, is that during the reset phase U1's output will go high while the capacitor is charged. This will cause the voltage at U2's inputs to go above the usual maximum voltage and discharge the capacitor through the chip's protection diodes. This may or may not be ok in practice but something to be aware of.


Agreed. Would the solution be a current-limiting resistor between V1 and U2?

The gate at U2 should have maximum current documented in the data sheet, and the small resistance could be dialed in to limit the current to a fraction of the maximum.

Brian