[sdiy] Flangelicious noises - some queries about NCO jitter and resampling and similar

[René Schmitz]

Hi Richie,

On 28.01.2020 13:23, rburnett at richieburnett.co.uk wrote:
 >>> What I don’t understand though is how this helps. Increasing the
 >>> output frequency is going to increase aliasing too, and dividing it
 >>> down again afterwards doesn’t seem to remove that to me. How does
 >>> this work please, René?
 >>
 >>  It's a standard trick. With higher DDS clock you get smaller
 >> time-errors, and then the divide down just removes transitions between
 >> the transitions. Higher synthesized frequency allows you to use more
 >> of the upper bits of the DDS, to achieve more effective bits useable
 >> in the DDS.
 >
 > Ok, so this allows you to make better use of the available DDS frequency
 > bit resolution, by synthesising a higher output frequency and then
 > dividing it down.  But it doesn't do anything to help with
 > jitter/aliasing at the top end.

Here are your original points:
1) Resampling of the LFO output by the NCO reset
2) Frequency stepping caused by the NCO minimum frequency step
3) Jitter cycles caused by the NCO

Well it helps updating your NCO more frequently, because each cycle is 
shorter now. I.e. higher sampling rate of your LFO.

The NCOs minimum frequency step is reduced. Because the tuning word 
effectively shifts right, bringing in room for more LSBs.

The cycle to cycle time variation (aka jitter) is still 1/f(clock) of 
your NCO. Not really an improvement there by the division, if you run 
the NCO at the same frequency as before. But if you can run the NCO 
clock higher then the variation is reduced.

Best,
  René

--
synth at schmitzbits.de
http://schmitzbits.de