[sdiy] Flangelicious noises - some queries about NCO jitter and resampling and similar

rburnett at richieburnett.co.uk rburnett at richieburnett.co.uk
Tue Jan 28 13:23:34 CET 2020


>> What I don’t understand though is how this helps. Increasing the
>> output frequency is going to increase aliasing too, and dividing it
>> down again afterwards doesn’t seem to remove that to me. How does
>> this work please, René?
> 
>  It's a standard trick. With higher DDS clock you get smaller
> time-errors, and then the divide down just removes transitions between
> the transitions. Higher synthesized frequency allows you to use more
> of the upper bits of the DDS, to achieve more effective bits useable
> in the DDS.

Ok, so this allows you to make better use of the available DDS frequency 
bit resolution, by synthesising a higher output frequency and then 
dividing it down.  But it doesn't do anything to help with 
jitter/aliasing at the top end.

-Richie,



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