[sdiy] Flangelicious noises - some queries about NCO jitter and resampling and similar

[Magnus Danielson]

Hi,

On 2020-01-27 15:01, Tom Wiltshire wrote:
>
>
>
> Thanks everyone for so many ideas. I’d like to go through some of them
> in turn, since there’s a lot I don’t understand.
>
>> On 23 Jan 2020, at 12:23, René Schmitz <synth at schmitzbits.de
>> <mailto:synth at schmitzbits.de>> wrote:
>>
>> One approach would be to somehow(*) raise the frequency of the NCO
>> and divide it down afterwards. If the chip can not do that directly,
>> its no longer a single chip solution. But if you could generate the
>> frequency say 3 octaves up, then divide by 8, you reduce all effects.
>
> This might be possible. On the new chip, I have room to increase the
> frequency increment, (24-bit inc with 24-bit accumulator running on
> 32MHz clock) which would give a higher output frequency. This might
> then be able to be routed through some other internal module to divide
> it down - after all, there’s a lot of things that can be made to do a
> flip-flop's job.
>
> What I don’t understand though is how this helps. Increasing the
> output frequency is going to increase aliasing too, and dividing it
> down again afterwards doesn’t seem to remove that to me. How does this
> work please, René?
It's a standard trick. With higher DDS clock you get smaller
time-errors, and then the divide down just removes transitions between
the transitions. Higher synthesized frequency allows you to use more of
the upper bits of the DDS, to achieve more effective bits useable in the
DDS.
>
>> On 23 Jan 2020, at 13:36, Magnus Danielson <magnus at rubidium.se
>> <mailto:magnus at rubidium.se>> wrote:
>>
>> You can increase the NCO resolution by doing a software extension of
>> bits, so you accumulate the error between where you wanted to steer the
>> NCO and what you have set it to. As you do this often enough, you can
>> keep amplitude of time error down and rate of update noise up.
>
> This sounds interesting, but I don’t really understand what you’re
> proposing. What do you mean “time error” and “update noise”? And what
> do you mean “steering” the NCO? The value it gets set to is the
> required value given the current modulation value, but the problem is
> that that value doesn’t take effect immediately.
>
> Note this is a hardware module, so I don’t get software access every
> time the frequency increment is added, only when the counter overflows
> (and then only in an interrupt a few cycles later). If that makes a
> difference.
What you can do is to alter the value you write into it. Consider that
you can write 42 and 43, by alternating the pattern you can go from 42
42 42 42 to 42 42 43 42 to 42 43 42 43 to 42 43 43 43 to 43 43 43 43.
For this trivial example you now on average write 42.0, 42.25, 42.50,
42.75 and 43.00. This increases your resolution. If you do this using a
accumulator you can keep in memory how much you intended to write and
then compensate that later. This is just a phase-accumulator or
frequency error accumulator. Trivial code to achieve improved resolution.
>
>> Another trick is to use a PLL to clean up the noise.
>
> Several people mentioned using a PLL in one way or another. Clearly, I
> could design a “better” LFO+VCO combination that wouldn’t have the
> problems that I currently have, and using the PIC for the LFO and
> something like the 4046 for the VCO would be a good way to go.
> But the point of the project was to simplify a flanger circuit as far
> as possible, so getting both the LFO and the VCO onto an 8-pin DIP
> chip counts as success, and using a 14-pin external VCO or larger
> 32-bit ARM processor doesn’t meet the aims.
> I’m willing to accept the limitations that go with this approach, but
> I’d like to learn as much as I can to enable me to minimise them as
> far as possible. I suspect (but don’t *know*) that further improvement
> is possible.

Well, either you use a modern clock circuit that provides what you need,
or you have to build it separately yourself. Some chips contains
clean-up oscillators, others lock up a high-frequency oscillator.

What tools do you have to measure? Do you have a counter that can do
time-interval measures?

It is relatively easy to servo up another oscillator, and then analyze
the output of the phase-detector. That way you can see the time-signal
and spectrum of the phase-noise.

Cheers,
Magnus


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://synth-diy.org/pipermail/synth-diy/attachments/20200128/16b8235e/attachment.htm>