[sdiy] clock pulse to vtrig

Joe Frey frey at radioles.com
Fri Mar 1 10:54:00 CET 2019

I am building the trigger delay and have run into a snag. Hopefully, it's just my inexperience. I have had pcbs of the gerber files made and have all the components in but I am not getting -15v across c17 or 15v across c2. What are fr1 and fr2. Do fr1 and fr2 need to be jumpered? Link below. Thanks for any help you can give. JoeF


⁣Sent from TypeApp ​

On Dec 18, 2018, 3:31 AM, at 3:31 AM, Harald <sdiy at haraldswerk.de> wrote:
>Maybe this one can help: 
>Just leave the delay part out and adjust the C value in the length part
>to your needs.
>Am 17.12.18 um 20:03 schrieb Joe Frey:
>> Hello all, this is a follow-up to an email from 2 weeks ago some may
>> Anyway, I am using a clock out from my EHX 8-step sequencer to
>trigger my
>> Lyra-8. The Lyra-8 plays for as long as the clock pulse. I want to be
>able to
>> create a longer and variable pulse using a circuit. I am not
>interested in
>> tackling programming a microcontroller, yet.
>> Can anyone point me in the direction of some circuitry that can do
>this? Thanks.
>> JoeF.
>> Sent from TypeApp <http://www.typeapp.com/r?b=14068>
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