[sdiy] Problems with linearized SSI2164 ?

Mattias Rickardsson mr at analogue.org
Thu Feb 7 00:15:29 CET 2019


Have you asked Dan et al. about this matter?

/mr

Den tors 7 feb. 2019 00:08 skrev Danjel van Tijn <danjel at intellijel.com>:

> Here is a link to the schematic block: https://ibb.co/njhCcbZ
>
> Really just a standard Mike Irwin configuration that we have used on
> literally thousands of modules.   Dave Dixon and I have tended to use 30k
> as the standard input resistance to the VCA cells but on more recent
> designs we have started using 100k.
>
> Unfortunately we just built a ton of modules with the SSI2164 and our
> factory did not tell me they had switched to the new chip (from the
> v2164).   We can re-work these by replacing the three 30k resistors with
> 100k but I would still like to understand this better.  It also
> unfortunately means the SSI2164 is not a blind drop in replacement for the
> V2164 and I am going to have to test out the rest of our circuits very
> carefully before any more manufacturing.
>
> Hopefully this helps some other folks avoid the same headache!
>
>
>
> On Wed, Feb 6, 2019 at 3:01 PM Neil Johnson <neil.johnson71 at gmail.com>
> wrote:
>
>> Hi Danjel,
>>
>> Can you share the circuit you are building?  Do you have some means of
>> pulling the leakage current out of the summing node?  This is usually done
>> with a high-value resistor.  And the issue Matthias raised is that with 30k
>> you are sending more current into the gain cell, so the leakage current
>> will be higher (well, it's not really leakage in the classic sense, but the
>> fact that as this is a log circuit you can never achieve infinite
>> attenuation, so *some* current will leak through.
>>
>> As to why there is a difference, I would need to make some measurements
>> on the bench.  One difference I do know is that the SSI2164 has much larger
>> transistors in the gain cell, giving better log conformance, but they may
>> exhibit different "off" behaviours.
>>
>> The 0.85V you are seeing - that would equate to about 26dB attenuation.
>> In the Irwin linearised circuit an input CV of 0V would force the VCA CV to
>> very positive (op-amp output pinned to the +ve rail) as it tries to
>> attenuate the bias current to 0 with infinite attenuation.
>>
>> Cheers
>> Neil
>>
>>
>> On Wed, 6 Feb 2019 at 22:20, Danjel van Tijn <danjel at intellijel.com>
>> wrote:
>>
>>> Hi there,
>>>
>>> Has anyone else experienced issues with the SSI2164 used in place of a
>>> Coolaudio 2164 in a linearized VCA configuration?
>>>
>>> With no CV applied to the circuit control pin of the VCA should be close
>>> to 0 (and it is when I swap back in a coolaudio chip)  but with a SSI2164
>>> the voltage at the control pin is around 0.85V.
>>>
>>> I am using accurate voltage sources for the negative and positive
>>> voltage references (-5 and +5). and as aforementioned swapping in a
>>> coolaudio chip returns the circuit to working as expected.
>>> Opamp is a  TI TL072CPWR.
>>>
>>> The only two differences from the datasheet version are that we are
>>> using 30K for Rin and 510R+560p for stability;  both are within range of
>>> acceptable values according to datasheet.
>>>
>>> Any thoughts?  possibly bad batch of ICs?
>>>
>>>
>>> --
>>> cheers,
>>>
>>> Danjel van Tijn
>>> Intellijel Designs Inc.
>>> m. +001 604-773-2426 <(604)%20773-2426>
>>>
>>> www.intellijel.com
>>> https://www.instagram.com/intellijel/
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>>> www.youtube.com/intellijel
>>> www.twitter.com/intellijel
>>>
>>>
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>>
>>
>> --
>> http://www.njohnson.co.uk
>>
> --
> cheers,
>
> Danjel van Tijn
> Intellijel Designs Inc.
> m. +001 604-773-2426 <(604)%20773-2426>
>
> www.intellijel.com
> https://www.instagram.com/intellijel/
> www.facebook.com/intellijel
> www.youtube.com/intellijel
> www.twitter.com/intellijel
>
>
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