[sdiy] LTSpice problem: simulating Irwin/Gallo linearised 2164 VCA
neil.johnson71 at gmail.com
Thu Aug 22 17:28:43 CEST 2019
> Thanks Richie. I hadn’t bothered modelling the 560p/500R networks that the 2164 demands in reality, but perhaps adding those will help here. I’ll give it a try and see what happens.
It depends on your 2164 model. If it's just a basic behavioural model
then you don't need it, but if it's any where near a full or semi-full
discrete transistor model then you do need those compensation parts or
the 2164 will oscillate into the 100's of kHz!
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