[sdiy] Query about best cap type for '2164 stability network

[Neil Johnson]

Hi Tom,

> Ok, a follow-up question, since I’m here to learn.
>
> What’s the relationship between the 30K input resistor value and the
> 500R/560pF lead-lag compensator values?
>
> The stated RC give a 1/2PiRC of about 570KHz. Where does 30K fit into the
> picture? How did AD’s engineers arrive at those values? They provide them,
> but they don’t tell you how they were derived or why, which would have been
> more interesting. Perhaps to some of you it’s obvious (hence the omission in
> the datasheet), but to me it’s totally obscure.

Since ADI stopped making that chip some time ago, I doubt they will be
able to answer now.  On the other hand I have asked SSI to provide
details, but because it involves knowledge of the internal design of
the 2164 I doubt we will get the exact equation.  I've had some
discussions with SSI on coming up with compensation network values for
different signal source impedances (we got down to around 10k IIRC)
and I hope they put some of those figures into a revised datasheet.

Neil
-- 
http://www.njohnson.co.uk