[sdiy] Query about best cap type for '2164 stability network

[Tom Wiltshire]

> On 4 May 2018, at 13:59, Neil Johnson <neil.johnson71 at gmail.com> wrote:
> 
> Hi Tom,
> 
>> Neil Johnson wrote:
>>> Umm...no.  The input pin is actually the summing node of an inverting
>>> op-amp circuit.  The RC circuit forms a lead-lag compensator to
>>> stabilise it.  The values shown in the ADI datasheet are optimised for
>>> a 30k input resistor.
>> 
>> 
>> I see! It’s phase compensation. I thought wrong. Thanks Neil.
> 
> Yes, and you can apply the same technique to op-amps as well to
> improve high-frequency performance (although well above the audio
> range unless you're after very high gains).

Ok, a follow-up question, since I’m here to learn.

What’s the relationship between the 30K input resistor value and the 500R/560pF lead-lag compensator values?

The stated RC give a 1/2PiRC of about 570KHz. Where does 30K fit into the picture? How did AD’s engineers arrive at those values? They provide them, but they don’t tell you how they were derived or why, which would have been more interesting. Perhaps to some of you it’s obvious (hence the omission in the datasheet), but to me it’s totally obscure.

Thanks,
Tom


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