[sdiy] NCO Jitter (was Large Numbers)

[Richie Burnett]

With clocking speed of 10Mhz or more a raw NCO starts to sound pretty good over the full audio range. (Aliased harmonics are approximately 60dB down for a 10khz sawtooth generated at 10 Mhz.) Higher sampling rates are obviously better though. The NCO in the alpha juno used a 12 Mhz clock if I remember correctly.

But you either need to band-limit and decimate this down to a lower sample rate before outputting it to a standard dac, or alternatively send the signal at the full sample rate of 10Mhz to a suitably fast dac. Otherwise you will incur aliasing as Eric said.

-Richie, 

Ps, I would encourage you to read up about BLIT, MinBLEP, polyBLEP, etc, if your're interested in digital synthesis of classic analog waveforms with reduced aliasing. These algorithms solve the problem of aliasing a more elegantly than just increasing the sample rate. They are a lot more efficient than simply burning CPU cycles by oversampling, which turns out to be a relatively poor method of achieving the end result. Papers by Tim Stilton and Eli Brandt are a good place to start.

Sent from my Xperia SP on O2

---- Tim Ressel wrote ----

>So how much overclocking on the an NCO is needed to reduce the jitter to 
>an acceptable level? I will be sampling at 48K. If I run the NCOs at 20x 
>that rate, is that good enough?  Keeping in mind I have 10 NCOs to 
>operate and a proc running at 180 MHz.
>
>--timster
>
>
>On 7/13/2018 1:29 PM, Tom Wiltshire wrote:
>> The amount of jitter is related to the clock rate, since basically you jitter by having an extra clock cycle occasionally to keep the mean where you need it. E.g. The jitter is one clock period.
>>
>> Increasing the accumulator size will increase your frequency accuracy, but it won’t reduce the jitter. If you ran a 128-bit NCO at 32KHz, it would jitter like hell but be accurate to fractions of a picohertz. If you ran a 16-bit NCO at 400MHz, it’d have little jitter, but relatively big frequency steps.
>>
>> Someone please step in if this is not correct - this is my understanding having played with these things a good deal.
>>
>> Tom
>>
>>
>>> On 13 Jul 2018, at 19:33, Tim Ressel <timr at circuitabbey.com> wrote:
>>>
>>> If you must pry...  ;-)
>>>
>>> I am playing with using a 64 bit accumulator in a DCO (NCO?) to fix the top jitter problem. The notion is that increased resolution in the increment value will cause less top jitter.
>>>
>>> --tr
>>>
>>>
>>> On 7/13/2018 11:30 AM, Richie Burnett wrote:
>>>> Out of interest, what application requires table lookup of values to a resolution of better than 1 part in 10 to the 19 !?!?!?
>>>>
>>>> -Richie,
>>>>
>>>> Sent from my Xperia SP on O2
>>
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>
>-- 
>--Tim Ressel
>Circuit Abbey
>timr at circuitabbey.com
>
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