[sdiy] CMOS mystery

[Roman]

I'd say even up to 100k and nothing else.  But you also said it doesn't work in another circuit with clean 0/5V clock, so that probably wouldn't help.  Does it have to be 4024? So many other choices for one divider section.   Roman   Dnia 7 lipca 2018 02:16 David G Dixon <  dixon at mail.ubc.ca > napisał(a):  Hey Team,   So, just a quick update on the fifth generator situation...   (...)   So, I'm thinking that it would have been OK just to put the 10k  current-limiting resistor in between the raw square wave output and the 4024  CLK input, and let the on-board protection diode limit the voltage, with a  paltry 500uA of current flowing through it, which isn't going to hurt  anything.  Am I thinking about this correctly, or is it just a whole lot  harder and more sophisticated than my tiny brain is capable of conceiving?
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