[sdiy] FPGA Madness? (Was: NCO Jitter)

Tim Ressel timr at circuitabbey.com
Sat Aug 4 18:14:02 CEST 2018

Thanks everyone! It looks like the FPGA route is doable, although those 
CIC filters make me think I can do this on a processor after all. Maybe 
2 procs: one for handling MIDI and ADC tasks, and one as a oscillator 
core. Use SPI to write values to the osc core. NCOs are cheap so doing 9 
instances is no problemo. I need VCAs on each NCO but that is just a 
multiply. That might just work.


On 8/4/2018 6:06 AM, Scott Gravenhorst wrote:
> Michael Zacherl <sdiy-mz01 at blauwurf.info> wrote:
>>> On 4 Aug 2018, at 06:38, Scott Gravenhorst <music.maker at gte.net> wrote:
>>> but I did it the "wrong" way by making an FIR filter with a
>>> huge kernel.  The filter did the job to remove most of the alias artifacts, but it
>>> did some weird frequency dependent amplitude things especially at the high end of the
>>> audio spectrum.  I later learned that it is better to use cascaded smaller kernel
>>> filters,
>> Hi,
>> “kernel” == order of the filter?
>> m.
> Sorry, I neglected to state that the filter is a FIR type.
> FIR filters have a kernel of coefficients which define the impulse response.  The larger the
> kernel, the more definition one can have in the output spectral profile.  Larger kernels also take
> more time to compute which is a drawback of the FIR filter.  FIR filters can make good brick wall
> filters, that is, very flat response with steep roll off into the stop band.
> -- ScottG
> ________________________________________________________________________
> -- Scott Gravenhorst
> -- http://scott.joviansynth.com/
> -- When the going gets tough, the tough use the command line.
> -- Matt 21:22
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--Tim Ressel
Circuit Abbey
timr at circuitabbey.com

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