[sdiy] Outputs grounded! Re: SSI2164 datasheet updated

KD KD pic24hj at gmail.com
Sat Aug 18 18:16:21 CEST 2018

2018-08-17 14:27 GMT+02:00, Mattias Rickardsson <mr at analogue.org>:
> On Fri, 17 Aug 2018 at 02:02, KD KD <pic24hj at gmail.com> wrote:
>> 2018-08-12 11:37 GMT+02:00, Mattias Rickardsson <mr at analogue.org>:
>> >The same applies to the "Figure 7: Ultra-Low Noise VCA"
>> > example in the v3.0 datasheet, where all four inputs are tied together
>> > after a common input resistor and compensation network.
>> I guess you get equal input bias and saves resistors.
> I guess so too - but *why* do I get four equal currents?

Why? Thats not part of your original question, you split the currents
the currents goes in /out depending on design. Well, the in detail
currents are not entirely equal but close enough.

If you want "super details" explained send Guru Rossum a mail.
Not Email, paper mail. He gladly correspond is my experience. :-)

>>>And also many VCF schematics I've seen through the years, where the
>>>control currents of OTAs are generated as one common current, and then
>>>divided by connecting it to all OTAs with their control current inputs
>>> together.

>> The attempt is to distribute even currents, current split to each OTA
>> to sink rater to introduce a resistor % in uneven current for each.
>> What you get is a better performing VCF.
> Yes, but *why* do I get the current split in two equal halves? :-)
Probably of quantum mechanical properties? ;-)

>>>When a (virtual ground) VCA input is grounded, how can you know it
>>> doesn't  get a substantial DC signal current due to imperfections?

>> Measure it! According to Roman the cell is perfectly balanced.

>>> When many VCA inputs (or OTA control ports) are tied together,
>>> how can you know they get the same (current) signal?
>> You can measure it
> Measuring one unit doesn't prove how every unit behaves. :-)
I said use 2 DMM's, and measure up a reliable statistical number for a batch.
Chips from same wafer batch are more closely matched then chips from
different batches and its process issues over the years. But IC's date
stomped 2018 can be be from a old (NOS) wafer stock, bevare!

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