[sdiy] Outputs grounded! Re: SSI2164 datasheet updated

KD KD pic24hj at gmail.com
Sun Aug 12 04:31:00 CEST 2018

2018-08-12 1:58 GMT+02:00, Neil Johnson <neil.johnson71 at gmail.com>:

> Putting +3V on the control pin does not shut off the current mirrors,
> it just causes current to flow in a different internal path.

I'm trying to get to a solution among what people have said, yours included,
strange i have to repeat my self, so leave it at 0V whatever then, equal current
in both pairs. It was Romans suggestion back then it seamed resonable to
cause  less current in the input stage/feedback i thought so too, i'm sorry.

>> Else, leaving all pins open proofed working for 10k units (DIXON) without
>> any adverse effects no matter compliance or other data sheet figures.

> Oh well, must be right then. After all ten thousand is a big number indeed.

So your jealous on Dixon? Ok, what a disaster for Dixon have to recall 10k
modular units because it can cause other parts of the 2164 not operate
properly as mskala claims. Yet you havent said what actually hapends
when the output is left open? Nor answer other questions. I'm not surprised.

>> 1: Output cant be tied via resistor to a potential like GND as LM13700
>> like  current to voltage conversion due to bad compliance figures in 2164.
>> So where does it leave the datasheet statement "output to GND" on unused
>> cells?

> Where indeed.  I guess on the one hand you could take the advice of
> analog chip design industry veterans who's IC designs have shipped in
> billions of parts and about whose design we are discussing, or on the
> other hand some bloke off the interwebs who says otherwise.  But feel
> free to cast your vote as you feel appropriate.
> Neil
> http://www.njohnson.co.uk

Im not casting votes i'm trying to find out why 2164 unused cells output shall
be connected to GND despite your contradictions say its "forced to" yet" not
necessary to" something not stated in the original AD sheets yet you claim so.
Great approach Niel. Thanks!

But heey, love to take the advice from superhero chip manufacturers
if they bothered to tell us WHY we shall do this or do that.

In 2015 you said about inputs quote:
>>I would connect it to ground via a 30k or 33k resistor. Or leave it
>>disconnected. I would not advise a direct connection to 0v.

Not to mention you say RC network provides lead-lag compensation
for that pole, keeping it stable.

Is this following advice of analog chip design industry veterans
mighty manufacturers datasheet? That's one heck of contradiction.

Then in 2018 you say:
>>*required* to force the output to the same(ish) voltage as the GND pin
>>- this usually done with the virtual earth node of an inverting
>>op-amp, but there is no reason for connecting it directly to GND.

So there we are, you butthurt saying we shall obey datasheet from holy
manufacturer connect input/output to GND yet you in next breath says we
shall not! Why even listen to what you say when its all contradictions?

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