[sdiy] dsPIC UART for multi-processor comms

Vladimir Pantelic vladoman at gmail.com
Sun Apr 22 19:17:37 CEST 2018


<jschwich53 at comcast.net> wrote:

> Sounds like something else is on the line. Are there programmable pull
> downs that are enabled?
>

or the Russians?






>
> -----Original Message-----
> From: Synth-diy [mailto:synth-diy-bounces at synth-diy.org] On Behalf Of Tom
> Wiltshire
> Sent: Sunday, April 22, 2018 10:05 AM
> To: rburnett at richieburnett.co.uk Burnett
> Cc: synth-diy at synth-diy org
> Subject: Re: [sdiy] dsPIC UART for multi-processor comms
>
> I’ve got all the UART Tx’s turned off except for the one on the Master,
> and the slaves only have the Rx connected to an external pin. The UART uses
> the “Peripheral Pin Select” feature on the dsPIC, so the UART IO pins
> aren’t actually connected to a hardware pin unless you explicitly set that
> up. So, no - definitely no Tx's all connected together.
>
> Checking the signals on the scope, the pulses look good, but the voltage
> level is dropping alarmingly. On a 3.3V processor, the high level is
> getting dragged down to around 1V - so that explains the failures. Question
> is, what explains the low voltage?
>
> I have done similar things with SPI in the past, but I quite fancied the
> 9-bit addressing. I2C is another possible solution, and that also including
> addressing in the hardware receiver.
>
> Thanks,
> Tom
>
> ==================
>        Electric Druid
> Synth & Stompbox DIY
> ==================
>
> > On 22 Apr 2018, at 16:44, Richie Burnett <rburnett at richieburnett.co.uk>
> wrote:
> >
> > Maybe a signal integrity issue, (reflection due to poor termination) if
> the interconnections are quite long at the prototyping stage. But 100k baud
> is a bit slow to run in to these problems. Have you looked at the waveform
> arriving at the UART rx inputs when it works and then again when it isn't
> working. This should reveal what's going wrong.
> >
> > You haven't tied multiple UART TX lines together somehow have you?
> >
> > Also, have you considered SPI instead? This is probably better for
> supporting a multi-drop network like this, if the slaves need to be able to
> send data back to the master too.
> >
> > -Richie,
> >
> > Sent from my Xperia SP on O2
> >
> > ---- Tom Wiltshire wrote ----
> >
> >> Hi all,
> >>
> >> I’m currently experimenting with communications between multiple
> dsPICs. I have one master processor sending messages, and four slave
> processors receiving them. I have a fifth slave processor on the comms line
> which acts as a “comms monitor” dsPIC+LCD and just displays all traffic so
> I can see what’s going on.
> >>
> >> The UART is sending at 100KHz, and I’m using the 9-bit mode, which
> allows me to ignore data bytes which aren’t intended for a given processor
> - e.g. each processor only has to keep an eye out for address bytes and
> check those, rather than having to read every single byte that is sent.
> >>
> >> However - I’ve got a problem. Comms to each of the slaves works fine
> individually, but as soon as I stick a second or further chip in its
> socket, the comms stops working (Comms monitor registers no messages
> either) and the slaves do nothing. Currently, it only works with the
> master, one slave, and the monitor connected.
> >>
> >> What’s the maximum “fan out” for a UART like this? Do I need to buffer
> its output to get more drive or something? Why would connecting more inputs
> to the signal kill the comms?
> >>
> >> Any help or advice appreciated. I’m sure I’m not the first person to
> have come up against this type of problem…
> >>
> >> Thanks,
> >> Tom
> >> _______________________________________________
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>
>
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