[sdiy] DCO Question

[paula at synth.net]

Tom,

totally agree with you.
It's about the "sound" not the "specification".

Paula

On 2017-11-03 13:05, Tom Wiltshire wrote:
> Hey, you’re preaching to the converted here, Paula!
> 
> My PIC-based VCDO design throws the rulebook out of the window and
> goes ahead and does it anyway. I made a few changes to mitigate
> against the worst effects of a NCO running at a limited sample rate,
> but not many, since there’s a lot else going on too. And the end
> result has “character” but actually sounds pretty good. Sure, you can
> push it and find its limits and compared to a high-quality analog
> oscillator it sounds dirty and gritty. But sometimes a bit of dirt and
> grit is just what you’re after…
> 
> So yeah, I agree. It’s definitely doable and you can choose how much
> you care about technical perfection.
> 
> Tom
> 
> ==================
>        Electric Druid
> Synth & Stompbox DIY
> ==================
> 
>> On 2 Nov 2017, at 21:57, paula at synth.net wrote:
>> 
>> Sorry to disagree, it is doable on lower end micros 002 (8bit) uses 
>> NCOs and does not use an FPGA.
>> You just need to find the right approach.
>> 
>> 
>> On 2017-11-02 18:23, Tom Wiltshire wrote:
>>> +1 Agree. Brute force oversampling is rarely a great solution. Only
>>> the Novation Peak has ever made this work effectively, and that was 
>>> on
>>> an FPGA.
>>> The irony for me is that the NCO’s “native” waveform is the ramp
>>> generated by the incrementing phase, and that is just about the worst
>>> case scenario from an aliasing point of view.
>>> One nice trick that I’ve seen is to output a triangle wave (and
>>> thereby massively reduce the aliasing since the harmonics rolloff so
>>> much faster)and then the rest of the wave shaping as if it were a
>>> standard analog triangle-core oscillator.
>>>> On 2 Nov 2017, at 17:58, Richie Burnett 
>>>> <rburnett at richieburnett.co.uk> wrote:
>>>> Yes, but this kind of brute force oversampling is quite inefficient 
>>>> in terms of benefit vs CPU cycles burned. You have to go to sample 
>>>> rates up in the MHz if you want to cover the full MIDI note range 
>>>> with a naive NCO based sawtooth and get decent alias suppression. 
>>>> Not a problem for dedicated hardware like an FPGA, but taxing for a 
>>>> low end micro.
>>>> -Richie,
>>>> Sent from my Xperia SP on O2
>>>> ---- John Speth wrote ----
>>>>> If we're talking about the classic NCO/DDS model, can't the 
>>>>> unwanted effect be reduced by using more bits and a faster clock?
>>>>> -----Original Message-----
>>>>> From: Synth-diy [mailto:synth-diy-bounces at synth-diy.org] On Behalf 
>>>>> Of Tim Ressel
>>>>> Sent: Thursday, November 02, 2017 8:27 AM
>>>>> To: SYNTH DIY <synth-diy at synth-diy.org>
>>>>> Subject: [sdiy] DCO Question
>>>>> Hi,
>>>>> I am making a digital oscillator (DCO) and was wondering if there 
>>>>> is a way to reduce the jitter one gets at higher frequencies. I 
>>>>> understand it comes from round off error (for lack of a better 
>>>>> term): as the accumulator reaches the top of the range the 
>>>>> remaining amount is less than the value being added, and that 
>>>>> fraction changes every cycle. This causes jitter, or is it 
>>>>> aliasing? Anyway, is there a clever way to deal with it?
>>>>> Thanks!
>>>>> --
>>>>> --Tim Ressel
>>>>> Circuit Abbey
>>>>> timr at circuitabbey.com
>>>>> _______________________________________________
>>>>> Synth-diy mailing list
>>>>> Synth-diy at synth-diy.org
>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>>>> _______________________________________________
>>>>> Synth-diy mailing list
>>>>> Synth-diy at synth-diy.org
>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>>> _______________________________________________
>>>> Synth-diy mailing list
>>>> Synth-diy at synth-diy.org
>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>> _______________________________________________
>>> Synth-diy mailing list
>>> Synth-diy at synth-diy.org
>>> http://synth-diy.org/mailman/listinfo/synth-diy